Detailed Section Descriptions; Block Diagram - Gestetner B130 Service Manual

4. DETAILED SECTION DESCRIPTIONS

4.1 BLOCK DIAGRAM

Engine
Board Interface
N V R A M
Flash ROM
Network
Interface
Interface
Board
The CPU (Destiny D8401A, 75MHz) controls the resident RAM, engine interface,
ROM interface, IEEE1284 parallel interface, NIB interface, and an IC card interface
for upgrading firmware.
There is one optional memory socket that can have either a 32MB, 64MB, or a
128MB memory DIMM to increase RAM capacity and enable RAM collation. With
the 128MB memory DIMM, the RAM capacity is increased to 144MB. There is
another memory socket for the optional PS2 DIMM.
The NIB interface allows the user to install an Ethernet NIB. The IC card interface
allows the interface for the controller and NIB to be updated.
SM
CÓPIA NÃO CONTROLADA
Engine C P U
(75 MHz)
(8 KB)
(4 MB)
NIB
4-1
CÓPIA NÃO CONTROLADA
BLOCK DIAGRAM
I E E E 1 2 8 4
I E E E 1 2 8 4
Interface
Option DIMM
Memroy
Interface
(32MB/64MB/
1 2 8 M B )
Resident
R A M
(16 MB)
P S 2
Interface
IC Card IC Card
Interface
B441D500.WMF
Option
D I M M
P S 2
D I M M
(4 MB)
(4 MB)
B441