C. Characteristics; Bus Interface Timing; Interface Timing; Figure 7-1: Sh-4 Timing - Epson S1D13704 Technical Manual

Embedded memory color lcd controller
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7 A.C. Characteristics

7.1 Bus Interface Timing

7.1.1 SH-4 Interface Timing
T
CKIO
CKIO
A[16:0]
RD/WR#
BS#
CSn#
WEn#
RD#
RDY#
D[15:0]
(write)
D[15:0]
(read)
S1D13704
X26A-A-001-04
Conditions: IO V
= 3.3V ± 10% or IO V
DD
T
= -40° C to 85° C
A
T
and T
for all inputs must be < 5 nsec (10% ~ 90%)
rise
fall
C
= 60pF (Bus/MPU Interface)
L
C
= 60pF (LCD Panel Interface)
L
t2
t3
t4
t6
t7
t8
t9
t11
t14

Figure 7-1: SH-4 Timing

Note
The SH-4 Wait State Control Register for the area in which the S1D13704 resides must be set to
a non-zero value. The SH-4 read-to-write cycle transition must be set to a non-zero value (with
reference to BUSCLK).
= 5V ± 10%
DD
*
t12
t16
VALID
Epson Research and Development
Vancouver Design Center
t5
t10
t13
t15
t17
Hardware Functional Specification
Issue Date: 01/02/08

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