Table 47-10: TRNG_CTL Register Fields (Continued)
Bit No.
(Access)
8
TSTMODE
(R/W)
7
MBITFAILMSK
(R/W)
6
PKRFAILMSK
(R/W)
5
LRUNFAILMSK
(R/W)
4
RUNFAILMSK
(R/W)
3
NOISEFAILMSK
(R/W)
2
STUCKOUTMSK
(R/W)
1
SHDNOVRMSK
(R/W)
0
RDYMSK
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Bit Name
Test Mode.
When the TRNG_CTL.TSTMODE bit is set, access is enabled to the
TRNG_LFSR_L,
cleared before enabling access) and sets the TRNG_STAT.NEEDCLK bit for testing
purposes. This bit must be set to 1 before various test modes in the
ister can be enabled.
Monobit Fail Mask.
When the TRNG_CTL.MBITFAILMSK bit is set, this mask allows the
TRNG_STAT.MBITFAIL bit to activate the (active HIGH) interrupt output.
Poker Fail Mask.
When the TRNG_CTL.PKRFAILMSK bit is set, this mask allows the
TRNG_STAT.PKRFAIL bit to activate the (active HIGH) interrupt output.
Long Run Fail Mask.
When the TRNG_CTL.LRUNFAILMSK bit is set, this mask allows the
TRNG_STAT.LRUNFAIL bit to activate the (active HIGH) interrupt output.
Run Fail Mask.
When the TRNG_CTL.RUNFAILMSK bit is set, this mask allows the
TRNG_STAT.RUNFAIL bit to activate the (active HIGH) interrupt output.
Noise Fail Mask.
When the TRNG_CTL.NOISEFAILMSK bit is set, this mask allows the
TRNG_STAT.NOISEFAIL bit to activate the (active HIGH) interrupt output.
Stuck Out Mask.
When the TRNG_CTL.STUCKOUTMSK bit is set, this mask allows the
TRNG_STAT.STUCKOUT bit to activate the (active HIGH) interrupt output.
Shutdown Overflow Mask.
When the TRNG_CTL.SHDNOVRMSK bit is set, this mask allows the
TRNG_STAT.SHDNOVR bit to activate the (active HIGH) interrupt output.
Ready Mask.
When the TRNG_CTL.RDYMSK bit is set, this mask allows the TRNG_STAT.RDY
bit to activate the (active HIGH) interrupt output.
Description/Enumeration
TRNG_LFSR_M
and
TRNG_LFSR_H
ADSP-SC58x TRNG Register Descriptions
TRNG_CNT
registers (the latter are
TRNG_TEST
and
reg-
47–19
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