ADSP-SC58x FIR Register Descriptions
FIR MAC Status Register
The
register provides the status of MAC operations. The status of all four multipliers/adders are
FIR_MACSTAT
available separately for programs to poll. In fixed-point mode only, the ARIx bits are used (all other bits are re-
served).
ARZ2 (RC)
Adder Result Underflow
MINV2 (RC)
Multiply Invalid
MRI2 (RC)
Multiplier Result Overflow
MRZ2 (RC)
Multiplier Result Underflow
AINV1 (RC)
Addition Invalid
ARI1 (RC)
Adder Result Overflow
ARZ1 (RC)
Adder Result Underflow
MINV1 (RC)
Multiply Invalid
AINV3 (RC)
Addition Invalid
ARI3 (RC)
Adder Result Overflow
ARZ3 (RC)
Adder Result Underflow
MINV3 (RC)
Multiply Invalid
Figure 51-23: FIR_MACSTAT Register Diagram
Table 51-24: FIR_MACSTAT Register Fields
Bit No.
(Access)
23
AINV3
(RC/NW)
51–40
15
14
13
12
11
10
0
0
0
0
0
0
31
30
29
28
27
26
25
0
0
0
0
0
0
Bit Name
Addition Invalid.
The FIR_MACSTAT.AINV3 bit is set if the adder 3 addition is invalid.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
9
8
7
6
5
4
3
2
0
0
0
0
0
0
0
0
24
23
22
21
20
19
18
17
0
0
0
0
0
0
0
0
Description/Enumeration
1
0
0
0
MRZ0 (RC)
Multiplier Result Underflow
MRI0 (RC)
Multiplier Result Overflow
MINV0 (RC)
Multiply Invalid
ARZ0 (RC)
Adder Result Underflow
ARI0 (RC)
Adder Result Overflow
AINV0 (RC)
Addition Invalid
MRZ1 (RC)
Multiplier Result Underflow
MRI1 (RC)
Multiplier Result Overflow
16
0
0
ARI2 (RC)
Adder Result Overflow
AINV2 (RC)
Addition Invalid
MRZ3 (RC)
Multiplier Result Underflow
MRI3 (RC)
Multiplier Result Overflow
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