Analog Devices ADSP-SC58 Series Hardware Reference Manual page 3354

Local Memory Access
The contents of FIR delay line and coefficient memories are made observable for debug by setting the
FIR_DBG_CTL.EN/FIR_DBG_CTL.MEM and FIR_DBG_CTL.HLD bits. The debug address register
(FIR_DBG_ADDR) and two data registers are provided for debug operations. Bit 11 of the
ter selects coefficient memory when set (=1) and selects delay line memory when cleared (=0).
In the debug mode, the read data register (FIR_DBG_RDDAT) returns the contents of the memory location point-
ed to by the address register. Data can be written into any memory location using
writes. If the address auto-increment bit (FIR_DBG_CTL.ADRINC) is set, the address register auto-increments on
FIR_DBG_WRDAT writes and
cannot cross the data memory or coefficient memory boundary.
Single-Step Mode
Programs can single step through the MAC operations and observe the memory contents after each step. The
FIR_DBG_CTL.EN, FIR_DBG_CTL.HLD, and FIR_DBG_CTL.MEM bits control the FIR MAC units.
Emulation Considerations
In FIR debug mode, the DMA operations are not observable.
Interrupts
The FIR Interrupt Overview table provides the source of interrupt and service instructions for the FIR interrupts.
Table 51-7: FIR Interrupt Overview
Default Programmable Inter-
rupt
FIR_DMA
FIR_STAT
Sources
The FIR module drives two interrupt signals: FIR_DMA for the DMA status and FIR_STAT for the MAC status.
The FIR module generates interrupts as described in the following sections.
Window Complete
This interrupt is generated at the end of each channel when all the output samples are calculated corresponding to a
window and updated index values are written back.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
FIR_DBG_RDDAT reads. During auto-increment the
Sources
Input DMA complete
Output DMA complete
Window complete
All channels complete
MAC IEEE floating-point exceptions
MAC fixed-point overflow
FIR_DBG_ADDR
FIR_DBG_WRDAT
FIR_DBG_ADDR
Masking Service
N/A ROC from
RTI instruction
ROC from
RTI instruction
Debug Features
regis-
register
register
FIR_DMASTAT +
+
FIR_MACSTAT
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