Analog Devices ADSP-SC58 Series Hardware Reference Manual page 3291

Sharc+ processor
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IDLE clocks are inserted between the adjacent channels for a total of three IDLE clocks. When channels are
skipped, one more IDLE clock is inserted for each unselected channel. Therefore, there are 3 (inter-channel
IDLE) + 2 (skipped channels) = 5 IDLE clocks between the fundamental and HAE_H3_INDX transfers.
Results Memory
The results memory is organized by the fundamental and 12 harmonic indexes. Each of the 13 potentially analyzed
frequencies has eight locations dedicated to store various power quality measurements. Each frequency is offset from
the next by eight locations.
The HAE Results Memory figure shows the results memory contents.
Figure 49-6: HAE Results Memory
RAM Parity Protection
HAE Results Upper Byte ID
The HAE results are stored in a 24-bit wide memory as shown in
When the system bus moves the results into memory, the HAE hardware appends a unique CHANNEL:INDEX
identifier to the upper byte of each results location. The intent of the ID byte is to help in data parsing of HAE
results.
The 32-bit appended result is as follows:
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
INDEX
0
1
GROUP
OFFSET
FUNDAMENTAL
0x00
F_IRMS
F_VRMS
H1_INDEX
0x08
H1_IRMS
H1_VRMS
H2_INDEX
0x10
H2_IRMS
H2_VRMS
H3_INDEX
0x18
H3_IRMS
H3_VRMS
H4_INDEX
H4_IRMS
0x20
H4_VRMS
H5_INDEX
0x28
H5_IRMS
H5_VRMS
H6_VRMS
H6_INDEX
0x30
H6_IRMS
H7_INDEX
0x38
H7_IRMS
H7_VRMS
H8_INDEX
0x40
H8_IRMS
H8_VRMS
H9_INDEX
0x48
H9_IRMS
H9_VRMS
H10_INDEX
0x50
H10_IRMS
H10_VRMS
H11_INDEX
0x58
H11_IRMS
H11_VRMS
H12_INDEX
0x60
H12_IRMS
H12_VRMS
2
3
4
5
F_ACT
F_REACT
F_APP
F_PF
H1_ACT
H1_REACT
H1_APP
H1_PF
H2_ACT
H2_REACT
H2_APP
H2_PF
H3_ACT
H3_REACT
H3_APP
H3_PF
H4_ACT
H4_REACT
H4_APP
H4_PF
H5_ACT
H5_REACT
H5_APP
H5_PF
H6_ACT
H6_REACT
H6_APP
H6_PF
H7_ACT
H7_REACT
H7_APP
H7_PF
H8_ACT
H8_REACT
H8_APP
H8_PF
H9_ACT
H9_REACT
H9_APP
H9_PF
H10_ACT
H10_REACT
H10_APP
H10_PF
H11_ACT
H11_REACT
H11_APP
H11_PF
H12_ACT
H12_REACT
H12_APP
H12_PF
Results
Memory.
HAE Architectural Concepts
6
7
N/A
N/A
H1_IHDN
H1_VHDN
H2_IHDN
H2_VHDN
H3_IHDN
H3_VHDN
H4_IHDN
H4_VHDN
H5_IHDN
H5_VHDN
H6_IHDN
H6_VHDN
H7_IHDN
H7_VHDN
H8_IHDN
H8_VHDN
H9_IHDN
H9_VHDN
H10_IHDN
H10_VHDN
H11_IHDN
H11_VHDN
H12_IHDN
H12_VHDN
49–9

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