Analog Devices ADSP-SC58 Series Hardware Reference Manual page 3162

ADSP-SC58x PKTE Register Descriptions
SA Command 1
The
PKTE_SA_CMD1
a write-only register.
BYTEOFFST (R/W)
Byte Offset
HMAC (R/W)
Keyed-Hash SSL Message Authentication
Code
SSLMAC (R/W)
Ssl Mac
CIPHERMD (R/W)
Cipher Mode
ENSQNCHK (R/W)
Sequence Number Check Enable
AESDECKEY (R/W)
AES Dec Key
ARC4KEYLEN (R/W)
ARC4 Key Length
Figure 44-43: PKTE_SA_CMD1 Register Diagram
Table 44-69: PKTE_SA_CMD1 Register Fields
Bit No.
(Access)
29 ENSQNCHK
(R/W)
28 AESDECKEY
(R/W)
44–114
register contains the minor control bits that define an operation. In direct host mode, this is
15 14 13 12
0 0 0
31 30 29 28
0 0 0
Bit Name
Sequence Number Check Enable.
The PKTE_SA_CMD1.ENSQNCHK bit defines that the key in the SA key field is an
AES encrypt key or an AES decrypt key.
AES Dec Key.
If the PKTE_SA_CMD1.AESDECKEY bit is set, the key in loaded in the
PKTE_SA_KEY[n]
expansion. If not set, the key loaded in the
to be the same key used during the encryption process.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
11 10 9 8 7 6 5
0 0 0 0 0 0 0 0
27 26 25 24 23 22 21 20
0 0 0 0 0 0 0 0
Description/Enumeration
0 Disable sequence number check
1 Enable sequence number check
registers are expected to be the key from the last round from key
0 AES key is an encrypt key.
1 AES key is a decrypt key.
4 3 2 1 0
0 0 0 0 0
CPYDGST (R/W)
Copy Digest
CPYHDR (R/W)
Copy Header
CPYPAYLD (R/W)
Copy Payload
CPYPAD (R/W)
Copy Pad
19 18 17 16
0 0 0 0 0
HSHCOFFST (R/W)
Hash Crypt Offset
AESKEYLEN (R/W)
AES Key Length
PKTE_SA_KEY[n] registers are expected