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1
6
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2 /
6
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G
o r
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(
M
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6
17.8 Status Register
The status register indicates the operating status of the flash memory and whether an erasing or a pro-
gramming operates normally and an error ends. The FMR00, FMR06, and FMR07 bits in the FMR0
register indicate the status of the status register.
Table 17.8.1 shows the status register.
In EW0 mode, the status register can be read in the following cases:
(1) When a given even address in the user ROM area is read after writing the read status register
command
(2) When a given even address in the user ROM area is read after executing the program or block
erase command but before executing the read a rray command.
17.8.1 Sequence Status (SR7 and FMR00 Bits )
The sequence status indicates the operating status of the flash memory. This bit is set to "0" (busy)
during an auto-programming and auto-erasing and "1" (ready) as soon as these operations are com-
pleted. This bit indicates "0" (busy) in erase-suspend mode.
17.8.2 Erase Status (SR5 and FMR07 Bits)
Refer to 17.8.4 Full Status Check.
17.8.3 Program Status (SR4 and FMR06 Bits)
Refer to 17.8.4 Full Status Check.
Table 17.8.1. Status Register
Bits in the
Bits in the
FMR0
SRD register
register
SR7 (D
)
FMR00
7
SR6 (D
)
6
SR5 (D
)
FMR07
5
FMR06
SR4 (D
)
4
SR3 (D
)
3
SR2 (D
)
2
SR1 (D
)
1
SR0 (D
)
0
• D
to D
: Indicates the data bus which is read out when executing the read status register command.
7
0
• The FMR07 bit (SR5) and FMR06 bit (SR4) are set to "0" by executing the clear status register command.
• When the FMR07 bit (SR5) or FMR06 bit (SR4) is 1, the program, and block erase command are not
acknowledged.
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0
2
0
2
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Status name
Sequence status
Reserved
Erase status
Program status
Reserved
Reserved
Reserved
Reserved
page 251
f o
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"0"
Busy
-
Completed normally
Completed normally
-
-
-
-
17. Flash Memory Version
Contents
"1"
Ready
-
Terminated by error
Terminated by error
-
-
-
-
Value
after
reset
1
0
0
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