M
1
6
C
2 /
6
A
G
o r
u
p
(
M
1
6
•Example when selecting AN
•Example 1: When AD
AD
pin input
TRG
AN
AN
AN
AN
•Example 2: When AD
pin input
AD
TRG
AN
AN
AN
AN
•Example 3: When AD
pin input
AD
TRG
AN
AN
AN
AN
Figure 14.1.8.1 Operation Example in Delayed Trigger Mode1
R
e
. v
2
0 .
0
F
e
b
1 .
, 5
2
0
0
7
R
E
J
0
9
B
0
2
0
2
0 -
2
0
0
C
2 /
6
, A
M
1
6
C
2 /
6
, B
M
1
6
to AN
to analog input pins (SCAN1 to SCAN0=01
0
3
pin falling edge is generated during AN
TRG
0
1
2
3
pin falling edge is generated again after AN
TRG
0
1
2
3
pin falling edge is generated more than two times after AN
TRG
0
1
2
3
page 206
f o
3
2
9
C
2 /
6
) T
2
pin conversion
0
pin conversion
0
(invalid)
)
A/D pin input
voltage sampling
A/D pin conversion
pin conversion
0
(valid after single sweep conversion)
14. A/D Converter