Renesas M16C/26A Series Hardware Manual page 105

16-bit single-chip microcomputer m16c family / m16c/tiny series
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M
1
6
C
2 /
6
A
G
o r
u
p
(
M
1
DMAi source pointer (i = 0, 1)
(b19)
(b23)
b3
b7
NOTE:
1. If the DSD bit in the DMiCON register is "0" (fixed), this register can only be written to when the DMAE bit in the
DMiCON register is "0" (DMA disabled). If the DSD bit is set to "1" (forward direction), this register can be written to
at any time. If the DSD bit is set to "1" and the DMAE bit is "1" (DMA enabled), the DMAi forward address pointer
can be read from this register. Otherwise, the value written to it can be read.
DMAi destination pointer (i = 0, 1)
(b19)
(b23)
b3
b7
NOTE:
1. If the DAD bit in the DMiCON register is "0" (fixed), this register can only be written to when the DMAE bit in the
DMiCON register is "0"(DMA disabled). If the DAD bit is set to "1" (forward direction), this register can be written to at
any time. If the DAD bit is set to "1" and the DMAE bit is "1" (DMA enabled), the DMAi forward address pointer can
be read from this register. Otherwise, the value written to it can be read.
DMAi transfer counter (i = 0, 1)
(b15)
b7
Figure 11.4 SAR0 and SAR1, DAR0 and DAR1, TCR0 and TCR1 Registers
R
e
. v
2
0 .
0
F
e
b
1 .
, 5
2
0
0
7
R
E
J
0
9
B
0
2
0
2
0 -
2
0
0
6
C
2 /
6
, A
M
1
6
C
2 /
6
, B
M
1
(1)
(b16)(b15)
(b8)
b0 b7
b0 b7
Set the source address of transfer
Nothing is assigned. When write, set "0". When read, these contents
are "0".
(1)
(b16)
(b15)
(b8)
b0 b7
b0 b7
Set the destination address of transfer
Nothing is assigned. When write, set "0". When read, these contents
are "0".
(b8)
b0 b7
b0
Set the transfer count minus 1. The written value is
stored in the DMAi transfer counter reload register, and
when the DMAE bit in the DMiCON register is set to "1"
(DMA enabled) or the DMAi transfer counter
underflows when the DMASL bit in the DMiCON
register is "1" (repeat transfer), the value of the DMAi
transfer counter reload register is transferred to the
DMAi transfer counter. When read, the DMAi transfer
counter is read.
page 86
f o
3
2
9
6
C
2 /
6
) T
b0
Symbol
SAR0
SAR1
Function
b0
Symbol
DAR0
DAR1
Function
Symbol
TCR0
TCR1
Function
Address
After reset
0022
to 0020
Indeterminate
16
16
0032
to 0030
Indeterminate
16
16
Setting range
00000
to FFFFF
16
16
Address
After reset
0026
to 0024
Indeterminate
16
16
0036
to 0034
Indeterminate
16
16
Setting range
00000
to FFFFF
16
16
Address
After reset
0029
, 0028
Indeterminate
16
16
0039
, 0038
Indeterminate
16
16
Setting range
0000
to FFFF
16
16
11. DMAC
RW
RW
RW
RW
RW
RW

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