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M
1
6
C
2 /
6
A
G
o r
u
p
(
M
1
6
P7
to P7
0
3
P8
to P8
2
4
P6
, P6
, P7
2
6
7
NOTE:
1.
Make sure the input voltage on each port will not exceed Vcc.
Figure 16.2. I/O Ports (2)
R
e
. v
2
0 .
0
F
e
b
1 .
, 5
2
0
0
7
R
E
J
0
9
B
0
2
0
2
0 -
2
0
0
C
2 /
6
, A
M
1
6
C
2 /
6
, B
M
1
Pull-up selection
Direction
register
Port latch
Data bus
Input to respective peripheral functions
Pull-up selection
Direction register
Data bus
Port latch
Input to respective peripheral functions
Pull-up selection
Direction register
Port latch
Data bus
Input to respective peripheral functions
symbolizes a parasitic diode.
page 219
f o
3
2
9
6
C
2 /
6
) T
"1"
Output
Switching
between
CMOS and
Nch
16. Programmable I/O Ports
(1)
(1)
(1)
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