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M
1
6
C
2 /
6
A
G
o r
u
p
(
M
1
6
CRC Data Register
(b15)
b7
CRC Input Register
b7
CRC Mode Register
b7
SFR Snoop Address Register
(b15)
b7
NOTE:
1. Set bits CRCSR and CRCSW to 0 if the PLC07 bit in the PLC0 register is set to 1 (PLL on) and the PM20 bit in
the PM2 register is set to 0 (SFR access 2 wait).
Figure 15.2. CRCD, CRCIN, CRCMR, CRCSAR Register
R
e
. v
2
0 .
0
F
e
b
1 .
, 5
2
0
0
7
R
E
J
0
9
B
0
2
0
2
0 -
2
0
0
C
2 /
6
, A
M
1
6
C
2 /
6
, B
M
1
6
(b8)
b0 b7
b0
CRC calculation result output
b0
Data input
b0
Bit symbol
Bit Symbol
CRCPS
CRCPS
Nothing is assigned.
(b6-b1)
Write "0" when writing to this bit. The value is indeterminate if read.
CRCMS
CRCMS
(b8)
b0 b7
b0
Symbol
CRCSAR
Bit Symbol
CRCSAR9-0
(b13-b10)
CRCSR
CRCSW
page 214
f o
3
2
9
C
2 /
6
) T
Symbol
Address
CRCD
03BD
to 03BC
16
Function
Symbol
Address
CRCIN
03BE
16
Function
Symbol
Address
CRCMR
03B6
16
Bit name
Bit Name
CRC mode polynomial
CRC mode polynomial
selection bit
selection bit
Nothing is assigned. If necessary, set to 0.
When read, the content is undefined
CRC mode selection bit
CRC mode selection bit
Address
03B5
to 03B4
16
Bit Name
CRC mode polynomial
selection bit
Nothing is assigned. If necessary, set to 0.
When read, the content is undefined
CRC snoop on read
enable bit
CRC snoop on write
enable bit
15. CRC Calculation Circuit
After Reset
Undefined
16
Setting Range
0000
to FFFF
16
After Reset
Undefined
Setting Range
00
to FF
16
16
After Reset
0XXXXXX0
2
Function
Function
16
16
12
12
5
5
0: X
0: X
+X
+X
+X
+X
+1 (CRC-CCITT)
+1 (CRC-CCITT)
16
16
15
15
2
2
1: X
1: X
+X
+X
+X
+X
+1 (CRC-16)
+1 (CRC-16)
0: LSB first
0: LSB first
1: MSB first
1: MSB first
After Reset
00XXXXXX XXXXXXXX
16
Function
Function
SFR address to snoop
0: Disabled
(1)
1: Enabled
0: Disabled
(1)
1: Enabled
RW
RW
16
RW
RW
RW
RW
RW
RW
RW
RW
2
RW
RW
RW
RW
RW
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