Renesas M16C/26A Series Hardware Manual page 244

M 1 6 C 2 / 6 A G o r u p ( M 1 6
Pull-up control register 0
b7 b6 b5 b4 b3
NOTE:
1. The pin for which this bit is "1" (pulled high) and the direction bit is "0" (input mode) is pulled high.
Pull-up control register 1
b7 b6 b5 b4 b3
NOTE:
1. The pin for which this bit is "1" (pulled high) and the direction bit is "0" (input mode) is pulled high.
Pull-up control register 2
b7 b6 b5 b4 b3
NOTE:
1. The pin for which this bit is "1" (pulled high) and the direction bit is "0" (input mode) is pulled high.
Figure 16.3.1. PUR0 to PUR2 Registers
R e . v 2 0 . 0 F e b 1 . , 5 2 0 0 7
R E J 0 9 B 0 2 0 2 0 - 2 0 0
C 2 / 6 , A M 1 6 C 2 / 6 , B M 1
b2 b1 b0
Symbol
PUR0
Bit symbol
Nothing is assigned. In an attempt to write to these bits, write
(b2-b0)
"0". The value, if read, turns out to be "0".
PU03 P1
Nothing is assigned. In an attempt to write to these bits, write
(b7-b4)
"0". The value, if read, turns out to be "0".
b2 b1 b0
Symbol
PUR1
Bit symbol
Nothing is assigned. In an attempt to write to these bits, write
(b3-b0)
"0". The value, if read, turns out to be "0".
PU14 P6
PU15 P6
PU16 P7
PU17 P7
b2 b1 b0
Symbol
PUR2
Bit symbol
PU20 P8
PU21 P8
PU22 P9
Nothing is assigned. In an attempt to write to these bits, write
(b3)
"0". The value, if read, turns out to be "0".
PU24 P10
PU25 P10
Nothing is assigned. In an attempt to write to these bits, write
(b7-b6)
"0". The value, if read, turns out to be "0".
page 225
f o 3 2 9
6 C 2 / 6 ) T
Address
03FC
16
Bit name
to P1 pull-up
5 7
Address
03FD
16
Bit name
to P6 pull-up
0 3
to P6 pull-up
4 7
to P7 pull-up
0 3
to P7 pull-up
4 7
Address
03FE
16
Bit name
to P8 pull-up
0 3
to P8 pull-up
4 7
to P9 pull-up
0 3
to P10 pull-up
0 3
to P10 pull-up
4 7
16. Programmable I/O Ports
After reset
00
16
Function
0 : Not pulled high
(1)
1 : Pulled high
After reset
00000000
2
Function
0 : Not pulled high
(1)
1 : Pulled high
After reset
00
16
Function
0 : Not pulled high
(1)
1 : Pulled high
0 : Not pulled high
(1)
1 : Pulled high
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW