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M
1
6
C
2 /
6
A
G
o r
u
p
(
M
1
6
(1) Setting 0000
(initial value)
16
(2) Setting 01
16
The code resulting from sending 01
16
12
5
(X
+ X
+ X
+ 1), becomes the remainder resulting from dividing(1000 0000)X
conformity with the modulo-2 operation.
1 0001 0000 0010 0001 1000 0000 0000 0000 0000 0000
Thus the CRC code becomes ( 1001 0001 1000 1000). Since the operation is in LSB first mode, the (1001 0001 1000 1000)
corresponds to 1189
selection bit to "1". CRC data register stores CRC code for MSB first mode.
(3) Setting 23
16
Figure 15.3. CRC Calculation
R
e
. v
2
0 .
0
F
e
b
1 .
, 5
2
0
0
7
R
E
J
0
9
B
0
2
0
2
0 -
2
0
0
C
2 /
6
, A
M
1
6
C
2 /
6
, B
M
1
6
b15
b15
1189
in LSB first mode is (10000 0000).This the CRC code in the generating polynomial,
16
LSB
1000 1000 0001 0000 1
1000 0001 0000 1000 0
1000 1000 0001 0000 1
1001 0001 1000 1000
LSB
9
8
in hexadecimal notation. If the CRC operation in MSB first mode is necessary, set the CRC mode
16
b15
0A41
page 215
f o
3
2
9
C
2 /
6
) T
b0
CRD data register CRCD
b7
b0
CRC input register CRCIN
2 cycles
After CRC calculation is complete
b0
CRD data register CRCD
16
Stores CRC code
MSB
1000 1000
MSB
1
1
b7
b0
CRC input register CRCIN
After CRC calculation is complete
b0
CRD data register CRCD
16
Stores CRC code
15. CRC Calculation Circuit
[03BD
, 03BC
]
16
16
[03BE
]
16
[03BD
, 03BC
]
16
16
16
by ( 1 0001 0000 0010 0001) in
Modulo-2 operation is
operation that complies
with the law given below.
0 + 0 = 0
0 + 1 = 1
1 + 0 = 1
1 + 1 = 0
-1 = 1
[03BE
]
16
[03BD
, 03BC
]
16
16
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