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M
1
6
C
2 /
6
A
G
o r
u
p
(
M
1
6
Flash Memory Control Register 4
b7 b6 b5 b4 b3 b2 b1 b0
0
0
NOTES:
1. Set the FMR40 bit to 1 immediately after setting it first to 0. Do not generate any interrupt or DMA
transfer between setting the bit to 0 and setting it to 1. Set by program in space other than the flash
memory in EW mode 0.
2. The FMR41 bit is valid only when the FMR40 bit is set to 1. The FMR41 bit can be written only
between executing an erase command and completing erase (this bit is set to 0 other than the
above duration). The FMR41 bit can be set to 0 or 1 by program in EW mode 0. In EW mode 1, the
FMR41 bit is automatically set to 1 when the FMR40 bit is 1 and a maskable interrupt is generated
during erasing. The FMR41 bit cannot be set to 1 by program (it can be set to 0 by program).
Figure 17.5.2. FMR4 register
R
e
. v
2
0 .
0
F
e
b
1 .
, 5
2
0
0
7
R
E
J
0
9
B
0
2
0
2
0 -
2
0
0
C
2 /
6
, A
M
1
6
C
2 /
6
, B
M
1
6
Symbol
0
0 0
FMR4
Bit Symbol
FMR40
FMR41
Reserved bit
(b5-b2)
FMR46
Erase status
(b7)
page 242
f o
3
2
9
C
2 /
6
) T
Address
01B3
16
Bit Name
Erase suspend function
0: Disabled
(1)
enable bit
1: Enabled
Erase suspend
0: Erase restart
(2)
1: Suspend request
request bit
Set to 0
0: During auto-erase operation
1: Auto-erase stop
(erase suspend mode)
Reserved bit
Set to 0
17. Flash Memory Version
After Reset
01000000
2
Function
RW
RW
RW
RO
RO
RW
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