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M
1
6
C
2 /
6
A
G
o r
u
p
(
M
1
6
P10
to P10
0
3
(inside dotted-line not included)
P1
, P1
5
6
P1
(inside dotted-line included)
7
P6
, P6
, P6
, P6
, P7
0
1
4
5
P8
, P8
0
1
NOTE:
1.
symbolizes a parasitic diode.
Make sure the input voltage on each port will not exceed Vcc.
Figure 16.1. I/O Ports (1)
R
e
. v
2
0 .
0
F
e
b
1 .
, 5
2
0
0
7
R
E
J
0
9
B
0
2
0
2
0 -
2
0
0
C
2 /
6
, A
M
1
6
C
2 /
6
, B
M
1
6
Data bus
Data bus
Input to respective peripheral functions
INPC1
to P7
,
4
6
Data bus
Input to respective peripheral functions
page 218
f o
3
2
9
C
2 /
6
) T
Pull-up selection
Direction register
Port latch
Analog input
Pull-up selection
Direction register
Port P1 control register
Port latch
Digital
/INT5
7
debounce
Pull-up selection
Direction
register
"1"
Output
Port latch
16. Programmable I/O Ports
(1)
(1)
(1)
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