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M
1
6
C
2 /
6
A
G
o r
u
p
(
M
1
UARTi Transmit Buffer Register (i=0 to 2)
(b15)
b7
NOTES:
1. Use MOV instruction to write to this register.
UARTi Receive Buffer Register (i=0 to 2)
(b15)
b7
NOTES:
1. When the SMD2 to SMD0 bits in the UiMR register are set to "000
disabled), all of the SUM, PER, FER and OER bits are set to "0" (no error). The SUM bit is set to "0" (no error) when all of the PER, FER and OER
bits are set to "0" (no error). Also, the PER and FER bits are set to "0" by reading the lower byte of the UiRB register.
2. The ABT bit is set to "0" by setting to "0" by program. (Writing "1" has no effect.)
Nothing is assigned at the bit 11 in the U0RB and U1RB registers. When write, set to "0". When read, its content is "0".
UARTi Baud Rate Generation Register (i=0 to 2)
b7
NOTES:
1. Write to this register while serial I/O is neither transmitting nor receiving.
2. Use MOV instruction to write to this register.
The transfer clock is shown below when the setting value in the UiBRG register is set as n.
(1) When the CKDIR bit in the UiMR register to "0" (internal clock)
• Clock synchronous serial I/O mode
• Clock asynchronous serial I/O (UART) mode
(2) When the CKDIR bit in the UiMR register to "1" (external clock)
• Clock synchronous serial I/O mode
• Clock asynchronous serial I/O (UART) mode
3. Set the UiBRG register after setting the CLK1 and CLK0 bits in the UiC0 registers.
Figure 13.1.4. U0TB to U2TB registers, U0RB to U2RB registers, U0BRG to U2BRG registers
R
e
. v
2
0 .
0
F
e
b
1 .
, 5
2
0
0
7
R
E
J
0
9
B
0
2
0
2
0 -
2
0
0
6
C
2 /
6
, A
M
1
6
C
2 /
6
, B
M
1
(1)
(b8)
b0
b7
b0
Transmit data
Nothing is assigned.
When write, set to "0". When read, its content is indeterminate.
(b8)
b0
b7
b0
Bit
Symbol
(b7-b0)
(b8)
(b10-b9)
ABT
OER
FER
PER
SUM
b0
Assuming that set value = n, UiBRG divides the count source
by n + 1
page 136
f o
3
2
9
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2 /
6
) T
Symbol
Address
After Reset
U0TB
03A3
-03A2
Indeterminate
16
16
U1TB
03AB
-03AA
Indeterminate
16
16
U2TB
037B
-037A
Indeterminate
16
16
Function
Symbol
Address
After Reset
U0RB
03A7
-03A6
Indeterminate
16
16
U1RB
03AF
-03AE
Indeterminate
16
16
U2RB
037F
-037E
Indeterminate
16
16
Bit Name
Receive data (D
Receive data (D
Nothing is assigned.
When write, set to "0". When read, its content is indeterminate.
Arbitration lost detecting
0 : Not detected
1 : Detected
flag
(2)
Overrun error flag
(1)
0 : No overrun error
1 : Overrun error found
Framing error flag
(1)
0 : No framing error
1 : Framing error found
Parity error flag
(1)
0 : No parity error
1 : Parity error found
Error sum flag
(1)
0 : No error
1 : Error found
" (serial I/O disabled) or the RE bit in the UiC1 register is set to "0" (reception
2
(1, 2, 3)
Symbol
Address
After Reset
U0BRG
03A1
Indeterminate
16
U1BRG
03A9
Indeterminate
16
U2BRG
0379
Indeterminate
16
Function
: fj/(2(n+1))
: fj/(16(n+1))
: f
EXT
: f
/(16(n+1))
EXT
fj : f1SIO, f2SIO, f8SIO, f32SIO
f
: Input from CLKi pin
EXT
Function
to D
)
7
0
)
8
Setting Range
00
to FF
16
16
13. Serial I/O
RW
WO
RW
RO
RO
RW
RO
RO
RO
RO
RW
WO
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