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M
1
6
C
2 /
6
A
G
o r
u
p
(
M
1
6
AV
P10
/AN
0
V
AV
P9
/TB1
/AN
1
IN
P9
/TB0
/AN
/CLK
0
IN
30
CNV
P8
/X
7
P8
/X
6
COUT
RESET
X
V
P8
/NMI/SD
5
P8
/INT
4
2
P8
/INT
3
P8
/INT
2
P8
/TA4
1
IN
P8
/TA4
0
OUT
P7
/TA3
7
Figure 1.7 Pin Assignment for 42-Pin Package (Top View)
R
e
. v
2
0 .
0
F
e
b
1 .
, 5
2
0
0
7
R
E
J
0
9
B
0
2
0
2
0 -
2
0
0
C
2 /
6
, A
M
1
6
C
2 /
6
, B
M
1
SS
1
0
2
REF
3
CC
4
31
5
out
6
SS
7
CIN
8
9
10
OUT
11
V
SS
12
X
IN
13
CC
14
15
/ZP
16
1
17
0
18
/U
19
/U
20
IN
21
page 13
f o
3
2
9
6
C
2 /
6
) T
P10
/AN
1
42
P10
/AN
2
41
P10
/AN
3
40
P10
/AN
4
39
P10
/AN
5
38
P10
/AN
6
37
P10
/AN
7
36
P1
/INT
5
35
P1
/INT
6
34
P1
/INT
7
33
P6
/CTS
4
32
P6
/CLK
5
31
P6
/RxD
6
30
P6
/TxD
7
29
P7
/TxD
28
0
P7
/RxD
27
1
P7
/CLK
2
26
P7
/CTS
25
3
P7
/TA2
24
4
P7
/TA2
5
23
P7
/TA3
22
6
NOTE:
1. Set PACR2 to PACR0 bit in the PACR register
to "001
" before you input and output it after
2
resetting to each pin. When the PACR register
isn't set up, the input and output function of
some of the pins are disabled.
Package: PRSP0042GA-B (42P2R)
1
2
3
/KI
4
0
/KI
5
1
/KI
6
2
/KI
7
3
/AD
/IDV
3
TRG
/IDW
4
/IDU
5
/RTS
/CTS
/CLKS
1
1
0
1
1
1
1
/SDA
/TA0
/CTS
/RTS
/CTS
2
2
OUT
1
1
/SCL
/TA0
/CLK
2
2
IN
1
/TA1
/V/RxD
2
OUT
1
/RTS
/TA1
/V/TxD
2
2
IN
1
/W
OUT
/W
IN
OUT
1. Overview
/CLKS
0
1
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