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M
1
6
C
2 /
6
A
G
o r
u
p
(
M
1
6
______
9.7 NMI Interrupt
_______
An NMI interrupt request is generated when input on the NMI pin changes state from high to low, after the
_______
NMI interrupt was enabled by writing a "1" to PM24 bit in the PM2 register. The NMI interrupt is a non-
maskable interrupt, once it is enabled.
The input level of this NMI interrupt input pin can be read by accessing the P8_5 bit in the P8 register.
_______
NMI is disabled by default after reset (the pin is a GPIO pin, P8
PM2 register. Once enabled, it can only be disabled by a reset signal.
_______
The NMI input has an effective digital debounce function for a noise rejection. Refer to 16.6 Digital
Debounce Function for this detail. When using NMI interrupt to exit stop mode, set the NDDR register to
"FF
" before entering stop mode.
16
9.8 Key Input Interrupt
Of P10
to P10
, a key input interrupt is generated when input on any of the P10
4
7
had the PD10_4 to PD10_7 bits in the PD10 register set to "0" (= input) goes low. Key input interrupts can
be used as a key-on wakeup function, the function which gets the microcomputer out of wait or stop mode.
However, if you intend to use the key input interrupt, do not use P10
9.8.1 shows the block diagram of the key input interrupt. Note, however, that while input on any pin which
has had the PD10_4 to PD10_7 bits set to "0" (= input mode) is pulled low, inputs on all other pins of the port
are not detected as interrupts.
Pull-up
transistor
KI
3
Pull-up
transistor
KI
2
KI
1
KI
0
Figure 9.8.1. Key Input Interrupt
R
e
. v
2
0 .
0
F
e
b
1 .
, 5
2
0
0
7
R
E
J
0
9
B
0
2
0
2
0 -
2
0
0
C
2 /
6
, A
M
1
6
C
2 /
6
, B
M
1
_______
PU25 bit in the
PD10 register
PD10_7 bit in the
PD10 register
PD10_7 bit in the PD10 register
PD10_6 bit in the
PD10 register
Pull-up
PD10_5 bit in the
transistor
PD10 register
PD10_4 bit in the
Pull-up
PD10 register
transistor
page 77
f o
3
2
9
6
C
2 /
6
) T
_______
) and can be enabled using PM24 bit in the
5
_______
______
to P10
4
7
to P10
as analog input ports. Figure
4
7
KUPIC register
Key input interrupt
Interrupt control circuit
request
9. Interrupt
pins which has
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