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M
1
6
C
2 /
6
A
G
o r
u
p
(
M
1
6
Timer Ai mode register (i= 0 to 4)
b7
b6
b5
b4
b3
NOTES:
1. Effective when the TAiTGH and TAiTGL bits in the ONSF or TRGSR register are '00
2. The port direction bit for the TAi
Figure 12.1.4.1. TAiMR Register in Pulse Width Modulation Mode
R
e
. v
2
0 .
0
F
e
b
1 .
, 5
2
0
0
7
R
E
J
0
9
B
0
2
0
2
0 -
2
0
0
C
2 /
6
, A
M
1
6
C
2 /
6
, B
M
1
6
b2
b1
b0
Symbol
1
1 1
TA0MR to TA4MR
Bit symbol
TMOD0
Operation mode
select bit
TMOD1
Pulse output funcion
MR0
select bit
External trigger select
MR1
bit
MR2
Trigger select bit
16/8-bit PWM mode
MR3
select bit
Count source select bit
TCK0
TCK1
pin must be set to "0" (= input mode).
IN
page 106
f o
3
2
9
C
2 /
6
) T
Address
0396
to 039A
16
16
Bit name
b1 b0
1 1 : PWM mode
0: Pulse is not output (TAiOUT pin functions as I/O port)
1: Pulse is output (TAiOUT pin functions as a pulse output
pin)
0: Falling edge of input signal to TAi
(1)
1: Rising edge of input signal to TAi
0 : Write "1" to TAiS bit in the TASF register
1 : Selected by TAiTGH to TAiTGL bits
0: Functions as a 16-bit pulse width modulator
1: Functions as an 8-bit pulse width modulator
b7 b6
0 0 : f
or f
1
0 1 : f
8
1 0 : f
32
1 1 : f
C32
After reset
00
16
Function
(2)
pin
IN
(2)
pin
IN
2
' (TAi
2
IN
12. Timer
RW
RW
RW
RW
RW
RW
RW
RW
RW
pin input).
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