Table of Contents
Advertisement
M
1
6
C
2 /
6
A
G
o r
u
p
(
M
1
6
3. Memory
Figure 3.1 is a memory map of the M16C/26A Group (M16C/26A, M16C/26B, M16C/26T). The M16C/26A
Group provides 1-Mbyte address space addresses 00000
The internal ROM is allocated lower address, beginning with address FFFFF
internal ROM area is allocated in addresses F0000
of 2-Kbyte internal ROM area, block A and block B, for data space. These blocks are allocated addresses
F000
to FFFF
.
16
16
The fixed interrupt vectors are allocated addresses FFFDC
of each interrupt routine.
The internal RAM is allocated higher addresses, beginning with address 00400
internal RAM area is allocated in addresses 00400
storing data. The area is also used as stacks when subroutines are called or interrupt requests are ac-
knowledged.
The SFR is allocated addresses 00000
cated here. All blank spaces within SFR location are reserved and cannot be accessed by users.
The special page vectors are allocated addresses FFE00
instruction and JSRS instruction. Refer to the Renesas publication M16C/60 and M16C/20 Series Soft-
ware Manual for details.
Internal RAM
Size
Address XXXXX
1K bytes
007FF
16
2K bytes
00BFF
16
NOTE:
1. Block A (2 Kbytes) and block B (2 Kbytes).
2. Do not write to the internal ROM in Mask ROM version.
Figure 3.1 Memory Map
R
e
. v
2
0 .
0
F
e
b
1 .
, 5
2
0
0
7
R
E
J
0
9
B
0
2
0
2
0 -
2
0
0
C
2 /
6
, A
M
1
6
C
2 /
6
, B
M
1
6
16
XXXXX
Internal ROM
Size
Address YYYYY
16
16
24K bytes
FA000
16
48K bytes
F4000
16
64K bytes
F0000
16
YYYYY
page 19
f o
3
2
9
C
2 /
6
) T
to FFFFF
16
to FFFFF
. The flash memory version has two sets
16
16
to FFFFF
16
to 007FF
. The internal RAM is used for temporarily
16
16
to 003FF
. The peripheral function control registers are allo-
16
to FFFDB
16
00000
16
SFR
00400
16
Internal RAM
16
Reserved
0F000
16
(1)
Internal ROM
(Data space)
0FFFF
16
Reserved
16
(2)
Internal ROM
(Program space)
FFFFF
16
.
16
. For example, a 64-Kbyte
16
and they store the start address
16
. For example, a 1-Kbyte
16
. They are used for the JMPS
16
FFE00
16
Special page
vector table
FFFDC
16
Undefined instruction
Overflow
BRK instruction
Address match
Single step
Watchdog timer
DBC
NMI
Reset
FFFFF
16
3. Memory
Advertisement
Table of Contents
