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13.1.5 Special Mode 3 (IE Bus mode )(UART2)
In this mode, one bit of IE Bus is approximated with one byte of UART mode waveform.
Table 13.1.5.1 lists the registers used in IE Bus mode and the register values set. Figure 13.1.5.1 shows
the functions of bus collision detect function related bits.
If the TxD2 pin output level and RxD2 pin input level do not match, a UART2 bus collision detect interrupt
request is generated.
Table 13.1.5.1. Registers to Be Used and Settings in IE Bus Mode
Register
Bit
U2TB
0 to 8
(1)
U2RB
0 to 8
OER,FER,PER,SUM Error flag
U2BRG
0 to 7
U2MR
SMD2 to SMD0
CKDIR
STPS
PRY
PRYE
IOPOL
U2C0
CLK1, CLK0
CRS
TXEPT
CRD
NCH
CKPOL
UFORM
U2C1
TE
TI
RE
RI
U2IRS
U2RRM,
U2LCH, U2ERE
U2SMR
0 to 3, 7
ABSCS
ACSE
SSS
U2SMR2
0 to 7
U2SMR3
0 to 7
U2SMR4
0 to 7
NOTE:
1. Not all bits in the registers are described above. Set those bits to "0" when writing to the registers in
IEBus mode.
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Set transmission data
Reception data can be read
Set a transfer rate
Set to '110
2
Select the internal clock or external clock
Set to "0"
Invalid because PRYE=0
Set to "0"
Select the TxD/RxD input/output polarity
Select the count source for the U2BRG register
Invalid because CRD=1
Transmit register empty flag
Set to "1"
Select TxD2 pin output mode
Set to "0"
Set to "0"
Set this bit to "1" to enable transmission
Transmit buffer empty flag
Set this bit to "1" to enable reception
Reception complete flag
Select the source of UART2 transmit interrupt
Set to "0"
Set to "0"
Select the sampling timing at which to detect a bus collision
Set this bit to "1" to use the auto clear function of transmit enable bit
Select the transmit start condition
Set to "0"
Set to "0"
Set to "0"
page 173
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Function
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13. Serial I/O
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