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9.9 Address Match Interrupt
An address match interrupt request is generated immediately before executing the instruction at the ad-
dress indicated by the RMADi register (i=0 to 1). Set the start address of any instruction in the RMADi
register. Use the AIER register's AIER0 and AIER1 bits to enable or disable the interrupt. Note that the
address match interrupt is unaffected by the I flag and IPL. For address match interrupts, the value of the
PC that is saved to the stack area varies depending on the instruction being executed (refer to "Saving
Registers").
(The value of the PC that is saved to the stack area is not the correct return address.) Therefore, follow one
of the methods described below to return from the address match interrupt.
• Rewrite the content of the stack and then use the REIT instruction to return.
• Restore the stack to its previous state before the interrupt request was accepted by using the POP or
similar other instruction and then use a jump instruction to return.
Table 9.9.1 shows the value of the PC that is saved to the stack area when an address match interrupt
request is accepted.
Figure 9.9.1 shows the AIER, RMAD0 and RMAD1 registers.
Table 9.9.1. Value of the PC that is saved to the stack area when an address match interrupt
request is accepted.
Instruction at the address indicated by the RMADi register
• 2-byte op-code instruction
• 1-byte op-code instructions which are followed:
ADD.B:S
#IMM8,dest
OR.B:S
#IMM8,dest
STNZ.B
#IMM8,dest
CMP.B:S
#IMM8,dest
JMPS
#IMM8
MOV.B:S
#IMM,dest (However, dest=A0 or A1)
Instructions other than the above
Value of the PC that is saved to the stack area : Refer to "Saving Registers".
Op-code is an abbreviation of Operation Code. It is a portion of instruction code.
Refer to Chapter 4 Instruction Code/Number of Cycles in M16C/60, M16C/20 Series Software Manual. Op-code is shown
as a bold-framed figure directly below the Syntax.
Table 9.9.2. Relationship Between Address Match Interrupt Sources and Associated Registers
Address match interrupt sources Address match interrupt enable bit
Address match interrupt 0
Address match interrupt 1
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SUB.B:S
#IMM8,dest
MOV.B:S
#IMM8,dest
STZX.B
#IMM81,#IMM82,dest
PUSHM
src
JSRS
#IMM8
AIER0
AIER1
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AND.B:S
#IMM8,dest
STZ.B
#IMM8,dest
POPM dest
Value of the PC that is
saved to the stack area
The address
indicated by the
RMADi register +2
The address
indicated by the
RMADi register +1
Address match interrupt register
RMAD0
RMAD1
9. Interrupt
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