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M
1
6
C
2 /
6
A
G
o r
u
p
(
M
1
System clock control register 0
b7
b6
b5
b4
NOTES:
1. Write to this register after setting the PRC0 bit in the PRCR register to "1" (write enable).
2. The CM03 bit is set to "1" (high) when the CM04 bit is set to "0" (I/O port) or the microcomputer goes to a stop mode.
3. This bit is provided to stop the main clock when the low power dissipation mode or on-chip oscillator low power dissipation
mode is selected. This bit cannot be used for detection as to whether the main clock stopped or not. To stop the main clock, the
following setting is required:
(1) Set the CM07 bit to "1" (Sub-clock select) or the CM21 bit in the CM2 register to "1" (on-chip oscillator select) with the sub-
clock stably oscillating.
(2) Set the CM20 bit in CM2 register to "0" (Oscillation stop, re-oscillation detection function disabled).
(3) Set the CM05 bit to "1" (Stop).
4. During external clock input, only the clock oscillation buffer is turned off and clock input is accepted.
5. When CM05 bit is set to "1", the X
X
pin is pulled "H" to the same level as X
IN
6. After setting the CM04 bit to "1" (X
CM07 bit from "0" to "1" (sub-clock).
7. When entering stop mode from high or middle speed mode, on-chip oscillator mode or on-chip oscillator low power mode, the
CM06 bit is set to "1" (divide-by-8 mode).
8. The f
clock does not stop. During low speed or low power dissipation mode, do not set this bit to "1" (peripheral clock turned
C32
off when in wait mode).
9. To use a sub-clock, set this bit to "1". Also make sure ports P8
10. When the PM21 bit of PM2 register is set to "1" (clock modification disable), writing to the CM02, CM05, and CM07 bits has no
effect.
11. If the PM21 bit needs to be set to "1", set the CM07 bit to "0"(main clock) before setting it.
12. To use the main clock as the clock source for the CPU clock, follow the procedure below.
(1) Set the CM05 bit to "0" (oscillate).
(2) Wait until td(M-L) elapses or the main clock oscillation stabilizes, whichever is longer.
(3) Set the CM11, CM21 and CM07 bits all to "0".
13. When the CM21 bit is set to "0" (on-chip oscillaor turned off) and the CM05 bit is set to "1" (main clock turned off), the CM06 bit is
fixed to "1" (divide-by-8 mode) and the CM15 bit is fixed to "1" (drive capability High).
14. To return from on-chip oscillator mode to high-speed or middle-speed mode set the CM06 and CM15 bits both to "1".
Figure 7.2. CM0 Register
R
e
. v
2
0 .
0
F
e
b
1 .
, 5
2
0
0
7
R
E
J
0
9
B
0
2
0
2
0 -
2
0
0
6
C
2 /
6
, A
M
1
6
C
2 /
6
, B
M
1
(1)
b3
b2
b1
b0
Symbol
CM0
Bit symbol
CM00
Clock output function
select bit
CM01
WAIT peripheral function
CM02
clock stop bit (10)
X
CIN
CM03
select bit (2)
Port X
CM04
(2)
Main clock stop bit
CM05
(3, 10, 12, 13)
Main clock division select
CM06
bit 0 (7, 13, 14)
System clock select bit
CM07
(6, 10, 11, 12)
pin goes "H". Furthermore, because the internal feedback resistor remains connected, the
OUT
OUT
-X
CIN
COUT
page 40
f o
3
2
9
6
C
2 /
6
) T
Address
After reset
0006
01001000
16
01101000
Bit name
Refer to Table 7.5.3.1 Function of the CLKout pin
0 : Do not stop peripheral function clock in wait mode
1 : Stop peripheral function clock in wait mode (8)
0 : LOW
-X
drive capacity
COUT
1 : HIGH
select bit
0 : I/O port P8
C
1 : X
-X
CIN
COUT
0 : On
1 : Off (4, 5)
0 : CM16 and CM17 valid
1 : Division by 8 mode
0 : Main clock, PLL clock, or on-chip oscillator clock
1 : Sub-clock
via the feedback resistor.
oscillator function), wait until the sub-clock oscillates stably before switching the
and P8
are directed for input, with no pull-ups.
6
7
7. Clock Generation Circuit
(M16C/26A, M16C/26B)
2
(M16C/26T)
2
Function
, P8
6
7
generation function (9)
RW
RW
RW
RW
RW
RW
RW
RW
RW
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