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M
1
6
C
2 /
6
A
G
o r
u
p
(
M
1
6
3
Port P1
Peripheral functions
Timer (16-bit)
Output (timer A): 5channels
Input (timer B): 3 channels
Three-phase motor
control circuit
10-bit A/D converter
10 channels
Watchdog timer
(15 bits)
DMAC
(2 channels)
CRC calculation circuit
(CCITT, CRC-16 )
Figure 1.2 Block Diagram( 42-pin Package)
R
e
. v
2
0 .
0
F
e
b
1 .
, 5
2
0
0
7
R
E
J
0
9
B
0
2
0
2
0 -
2
0
0
C
2 /
6
, A
M
1
6
C
2 /
6
, B
M
1
6
4
Port P6
Port P7
clock synchronous serial I/O
(8 bits X 2 channels)
R0H
R1H
page 5
f o
3
2
9
C
2 /
6
) T
8
8
Port P8
UART or
M16C/60 series CPU core
R0L
SB
R1L
USP
R2
ISP
R3
INTB
A0
PC
A1
FLG
FB
NOTES:
2
8
Port P9
Port P10
Clock generation circuit
XIN-XOUT
XCIN-XCOUT
On-Chip Oscillator
PLL frequency synthesizer
Memory
(1)
ROM
(2)
RAM
Multiplier
1: ROM size depends on the MCU type.
2: RAM size depends on the MCU type.
1. Overview
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