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Table 1-43: VCU110 FPGA U1 GTY Quad 128 Connections
FPGA (U1) Pin Name
MGTYTXP0_128
MGTYTXN0_128
MGTYRXP0_128
MGTYRXN0_128
MGTYTXP1_128
MGTYTXN1_128
MGTYRXP1_128
MGTYRXN1_128
MGTYTXP2_128
MGTYTXN2_128
MGTYRXP2_128
MGTYRXN2_128
MGTYTXP3_128
MGTYTXN3_128
MGTYRXP3_128
MGTYRXN3_128
MGTREFCLK0P_128
MGTREFCLK0N_128
MGTREFCLK1P_128
MGTREFCLK1N_128
Notes:
1. MGT connections I/O standard not applicable
2. Series capacitor coupled
For additional information about the 100 Gb/s C form-factor pluggable module, see the
CFP MSA CFP4 Hardware Specification
VCU110 Evaluation Board
UG1073 (v1.2) March 26, 2016
FPGA
Schematic Net Name
(U1) Pin
E40
CFP4_MOD3_TX3_P
E41
CFP4_MOD3_TX3_N
E45
CFP4_MOD3_RX3_P
E46
CFP4_MOD3_RX3_N
E36
CFP4_MOD3_TX2_P
E37
CFP4_MOD3_TX2_N
D43
CFP4_MOD3_RX2_P
D44
CFP4_MOD3_RX2_N
C40
CFP4_MOD3_TX1_P
C41
CFP4_MOD3_TX1_N
C45
CFP4_MOD3_RX1_P
C46
CFP4_MOD3_RX1_N
A40
CFP4_MOD3_TX0_P
A41
CFP4_MOD3_TX0_N
B43
CFP4_MOD3_RX0_P
B44
CFP4_MOD3_RX0_N
L36
CFP4_SI5328_OUT1_BUF4_C_P
L37
CFP4_SI5328_OUT1_BUF4_C_N
K34
CFP4_REC_CLOCK2_C_P(1)
K35
CFP4_REC_CLOCK2_C_N(1)
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Chapter 1:
VCU110 Evaluation Board Features
Connected
(1)
Pin Number
54
55
39
40
51
52
36
37
48
49
33
34
45
46
30
31
(2)
28
(2)
29
12
13
[Ref
29].
Connected
Connected
Pin Name
Device
TX3P--TX0P
TX3N--TX0N
RX3P--RX3N
RX3N--RX3P
TX2P--TX1P
TX2N--TX1N
RX2P--RX2N
CFP4
RX2N--RX2P
MOD3
TX1P--TX2P
J110
TX1N--TX2N
RX1P--RX1N
RX1N--RX1P
TX0P--TX3P
TX0N--TX3N
RX0N--RX0P
RX0P--RX0N
CKOUT1_P
SI5328
U179
CKOUT1_N
CKIN2_P
SI5328
U179
CKIN2_N
81
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