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Table 1-29: VCU110 FPGA U1 GTH Quad 224 Connections
FPGA
FPGA (U1) Pin
(U1)
Name
Pin
MGTHTXP0_224
AR7
MGTHTXN0_224
AR6
MGTHRXP0_224
AR2
MGTHRXN0_224
AR1
MGTHTXP1_224
AP9
MGTHTXN1_224
AP8
MGTHRXP1_224
AP4
MGTHRXN1_224
AP3
MGTHTXP2_224
AN7
MGTHTXN2_224
AN6
MGTHRXP2_224
AN2
MGTHRXN2_224
AN1
MGTHTXP3_224
AM9
MGTHTXN3_224
AM8
MGTHRXP3_224
AM4
MGTHRXN3_224
AM3
MGTREFCLK0P_224
AG11
MGTREFCLK0N_224
AG10
MGTREFCLK1P_224
AF13
MGTREFCLK1N_224
AF12
Notes:
1. MGT connections I/O standard not applicable.
2. Series capacitor coupled.
VCU110 Evaluation Board
UG1073 (v1.2) March 26, 2016
Schematic Net Name
FMC_HPC1_DP0_C2M_P
FMC_HPC1_DP0_C2M_N
FMC_HPC1_DP0_M2C_P
FMC_HPC1_DP0_M2C_N
FMC_HPC1_DP1_C2M_P
FMC_HPC1_DP1_C2M_N
FMC_HPC1_DP1_M2C_P
FMC_HPC1_DP1_M2C_N
FMC_HPC1_DP2_C2M_P
FMC_HPC1_DP2_C2M_N
FMC_HPC1_DP2_M2C_P
FMC_HPC1_DP2_M2C_N
FMC_HPC1_DP3_C2M_P
FMC_HPC1_DP3_C2M_N
FMC_HPC1_DP3_M2C_P
FMC_HPC1_DP3_M2C_N
FMC_HPC1_GBTCLK0_M2C_P
FMC_HPC1_GBTCLK0_M2C_N
FMC_HPC1_GBTCLK1_M2C_P
FMC_HPC1_GBTCLK1_M2C_N
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Chapter 1:
VCU110 Evaluation Board Features
Connected
(1)
Pin
Number
C2
C3
C6
C7
A22
A23
A2
A3
A26
A27
A6
A7
A30
A31
A10
A11
(2)
D4
(2)
D5
(2)
B20
(2)
B21
Connected
Connected
Pin Name
Device
DP0_C2M_P
DP0_C2M_N
DP0_M2C_P
DP0_M2C_N
DP1_C2M_P
DP1_C2M_N
DP1_M2C_P
DP1_M2C_N
DP2_C2M_P
DP2_C2M_N
DP2_M2C_P
FMC HPC1
DP2_M2C_N
J2
DP3_C2M_P
DP3_C2M_N
DP3_M2C_P
DP3_M2C_N
GBTCLK0_
M2C_P
GBTCLK0_
M2C_N
GBTCLK1_
M2C_P
GBTCLK1_
M2C_N
66
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