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Table 1-16: VCU110 FPGA U1 GTY Quad 124 Connections
FPGA (U1) Pin Name
MGTYTXP0_124
MGTYTXN0_124
MGTYRXP0_124
MGTYRXN0_124
MGTYTXP1_124
MGTYTXN1_124
MGTYRXP1_124
MGTYRXN1_124
MGTYTXP2_124
MGTYTXN2_124
MGTYRXP2_124
MGTYRXN2_124
MGTYTXP3_124
MGTYTXN3_124
MGTYRXP3_124
MGTYRXN3_124
MGTREFCLK0P_124
MGTREFCLK0N_124
MGTREFCLK1P_124
MGTREFCLK1N_124
Notes:
1. MGT connections I/O standard not applicable.
2. Series capacitor coupled.
VCU110 Evaluation Board
UG1073 (v1.2) March 26, 2016
FPGA
Schematic Net Name
(U1) Pin
AR40
BULLSEYE2_GTY_TX0_P
AR41
BULLSEYE2_GTY_TX0_N
AR45
BULLSEYE2_GTY_RX0_P
AR46
BULLSEYE2_GTY_RX0_N
AP38
BULLSEYE2_GTY_TX1_P
AP39
BULLSEYE2_GTY_TX1_N
AP43
BULLSEYE2_GTY_RX1_P
AP44
BULLSEYE2_GTY_RX1_N
AN40
BULLSEYE2_GTY_TX2_P
AN41
BULLSEYE2_GTY_TX2_N
AN45
BULLSEYE2_GTY_RX2_P
AN46
BULLSEYE2_GTY_RX2_N
AM38
BULLSEYE2_GTY_TX3_P
AM39
BULLSEYE2_GTY_TX3_N
AM43
BULLSEYE2_GTY_RX3_P
AM44
BULLSEYE2_GTY_RX3_N
AG36
BULLSEYE2_GTY_REFCLK0_C_P
AG37
BULLSEYE2_GTY_REFCLK0_C_N
AF34
BULLSEYE2_GTY_REFCLK1_C_P
AF35
BULLSEYE2_GTY_REFCLK1_C_N
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Chapter 1:
VCU110 Evaluation Board Features
Connected
Connected
(1)
Pin Number
Pin Name
15
16
17
18
11
12
13
14
7
8
9
10
3
4
5
6
(2)
19
(2)
20
(2)
1
(2)
2
Send Feedback
Connected
Device
P15
P16
P17
P18
P11
P12
P13
P14
P7
P8
BULLSEYE2
J122
P9
P10
P3
P4
P5
P6
P19
P20
P1
P2
51
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