Xilinx VCU110 User Manual page 7

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Three SI5328 clock multiplier and jitter attenuators
°
SMA user clock connector pair (differential)
°
52 GTY transceivers (13 Quads)
5 Quads connected to Interlaken connector
°
2 Quads connected to 2 BullsEye™ SMA connectors
°
2 Quads connected to EXAMAX connector
°
4 Quads connected to CPF4 connector
°
52 GTH transceivers (13 Quads)
8 Quads connected to HMC
°
2 Quads connected to FMC HPC0 connector DP
°
2 Quads connected to FMC HPC1 connector DP
°
1 Quad connected to PCIe® cable connector
°
Ethernet PHY SGMII interface with RJ-45 connector
Dual USB-to-UART bridge with micro-B USB connector
Status LEDs
User I/O (pushbuttons, DIP switch, LEDs)
Pmod header
Two VITA 47.1 FMC HPC connectors
Configuration options:
Quad-SPI flash memory
°
USB JTAG configuration port (Digilent module)
°
Platform cable 2 mm 2x7 shrouded header J3 JTAG configuration port
°
®
Zynq
XC7Z010 based system controller
VCU110 Evaluation Board
UG1073 (v1.2) March 26, 2016
Chapter 1:
www.xilinx.com
VCU110 Evaluation Board Features
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