Xilinx VCU110 User Manual page 43

Hide thumbs Also See for VCU110:
Table of Contents

Advertisement

The U179/U180 jitter attenuated clock multiplier circuit is shown in
X-Ref Target - Figure 1-11
114.285MHZ
CFP4_SI5328_XTAL_XA
1
3
CFP4_SI5328_XTAL_XB
XA
XB
2
4
GND1
GND2
20PPM
X7
GND
CFP4_REC_CLOCK_C_P
CFP4_REC_CLOCK_P
R1485
1
100
1/10W
CFP4_REC_CLOCK_N
2
1%
CFP4_REC_CLOCK_C_N
CFP4_REC_CLOCK2_P
CFP4_REC_CLOCK2_N
SI5328_INT_ALM
SI5328_RST
CFP4_REC_CLOCK2_C_P
R1622
1
100
1/10W
2
1%
CFP4_REC_CLOCK2_C_N
Figure 1-11: CFP4 Interface Jitter-Attenuating Clock Multiplier
For more details on the Silicon Labs SI5335A, SI570, SI53340 and SI5328C devices, see
[Ref
26].
The SI5328C U179 HMC clock multiplier is used to generate the multiple clock frequencies
required to drive the U160 HMC device and FPGA MGTH interface.
VCU110 Evaluation Board
UG1073 (v1.2) March 26, 2016
CFP4_SI5328_VCC
FERRITE-220
L104
1
2
GND
SI5328C-C-GM
5
2
NC
VDD1
NC1
10
9
NC
VDD2
NC2
32
14
NC
VDD3
NC3
30
NC
NC4
6
33
NC
XA
NC5
7
XB
16
29
CFP4_SI5328_OUT1_N
CKIN1_P
CKOUT1_N
17
28
CFP4_SI5328_OUT1_P
CKIN1_N
CKOUT1_P
12
35
NC
CKIN2_P
CKOUT2_P
CFP4_SI5328_VCC
13
34
NC
CKIN2_N
CKOUT2_N
36
CMODE
3
27
NC
INT_C1B
SDI
NC
4
23
CFP4_SI5328_SDA
C2B
SDA_SDO
NC
11
22
CFP4_SI5328_SCL
RATE0
SCL
NC
15
24
RATE1
A0
NC
18
25
LOL
A1
NC
19
26
NC6
A2_SS
NC
20
NC7
1
8
RST_B
GND1
21
31
CS_CA
GND2
1
U179
QFN36_6X6MM
R1483
2
4.70K
1/16W
1%
GND
GND
www.xilinx.com
Chapter 1:
VCU110 Evaluation Board Features
UTIL_3V3
C2071
10UF
6.3V
X6S
UTIL_3V3
C2069
1
1UF
2
25V
X5R
1%
2
1/10W
100
GND
R1484
SI53340-B-GM
1
6
9
CFP4_SI5328_OUT1_BUF1_P
CLK0_P
Q0_P
7
10
CFP4_SI5328_OUT1_BUF1_N
CLK0_N
Q0_N
NC
3
11
CFP4_SI5328_OUT1_BUF2_P
CLK1_P
Q1_P
NC
4
12
CFP4_SI5328_OUT1_BUF2_N
CLK1_N
Q1_N
13
CFP4_SI5328_OUT1_BUF3_P
Q2_P
2
14
CFP4_SI5328_OUT1_BUF3_N
CLK_SEL
Q2_N
15
CFP4_SI5328_OUT1_BUF4_P
Q3_P
R1482
16
CFP4_SI5328_OUT1_BUF4_N
1
Q3_N
4.70K
U180
QFN16_SI_3X3MM
1/16W
2
1%
GND
GND
CFP4_SI5328_VCC
C2070
C2067
C2066
1
1
1
1UF
0.1UF
0.1UF
2
25V
2
25V
2
25V
X5R
GND
Figure
1-11.
CFP4_SI5328_OUT1_BUF1_C_P
CFP4_SI5328_OUT1_BUF1_C_N
CFP4_SI5328_OUT1_BUF2_C_P
CFP4_SI5328_OUT1_BUF2_C_N
CFP4_SI5328_OUT1_BUF3_C_P
CFP4_SI5328_OUT1_BUF3_C_N
CFP4_SI5328_OUT1_BUF4_C_P
CFP4_SI5328_OUT1_BUF4_C_N
43
Send Feedback

Advertisement

Table of Contents
loading

Table of Contents