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Table 1-32: VCU110 FPGA U1 GTH Quad 227 Connections
FPGA
FPGA (U1) Pin Name
(U1)
MGTHTXP0_227
AC7
MGTHTXN0_227
AC6
MGTHRXP0_227
AC2
MGTHRXN0_227
AC1
MGTHTXP1_227
AB9
MGTHTXN1_227
AB8
MGTHRXP1_227
AB4
MGTHRXN1_227
AB3
MGTHTXP2_227
AA7
MGTHTXN2_227
AA6
MGTHRXP2_227
AA2
MGTHRXN2_227
AA1
MGTHTXP3_227
MGTHTXN3_227
MGTHRXP3_227
MGTHRXN3_227
MGTREFCLK0P_227
AA11
MGTREFCLK0N_227
AA10
MGTREFCLK1P_227
MGTREFCLK1N_227
Notes:
1. MGT connections I/O standard not applicable.
2. Series capacitor coupled.
VCU110 Evaluation Board
UG1073 (v1.2) March 26, 2016
Schematic Net Name
Pin
HMC_L1TX_11_P
HMC_L1TX_11_N
HMC_L1RX_11_C_P
HMC_L1RX_11_C_N
HMC_L1TX_14_P
HMC_L1TX_14_N
HMC_L1RX_14_C_P
HMC_L1RX_14_C_N
HMC_L1TX_15_P
HMC_L1TX_15_N
HMC_L1RX_15_C_P
HMC_L1RX_15_C_N
Y9
HMC_L1TX_13_P
Y8
HMC_L1TX_13_N
Y4
HMC_L1RX_13_C_P
Y3
HMC_L1RX_13_C_N
NA
NA
Y13
NA
Y12
NA
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Chapter 1:
VCU110 Evaluation Board Features
Connected Pin
Connected Pin
(1)
Number
AG29
AG28
L1RXN_11
(2)
AH26
(2)
AH25
AE27
AE26
L1RXN_14
(2)
AD30
(2)
AD29
AF28
AF27
L1RXN_15
(2)
AK28
(2)
AK27
AD26
AD25
L1RXN_13
(2)
AC29
(2)
AC28
NA
NA
NA
NA
Connected
Name
Device
L1RXP_11
L1TXP_11
L1TXN_11
L1RXP_14
L1TXP_14
L1TXN_14
HMC
U160
L1RXP_15
L1TXP_15
L1TXN_15
L1RXP_13
L1TXP_13
L1TXN_13
NA
NA
NA
NA
NA
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