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Table 1-18: VCU110 FPGA U1 GTY Quad 126 Connections
FPGA (U1) Pin Name
MGTYTXP0_126
MGTYTXN0_126
MGTYRXP0_126
MGTYRXN0_126
MGTYTXP1_126
MGTYTXN1_126
MGTYRXP1_126
MGTYRXN1_126
MGTYTXP2_126
MGTYTXN2_126
MGTYRXP2_126
MGTYRXN2_126
MGTYTXP3_126
MGTYTXN3_126
MGTYRXP3_126
MGTYRXN3_126
MGTREFCLK0P_126
MGTREFCLK0N_126
MGTREFCLK1P_126
MGTREFCLK1N_126
Notes:
1. MGT connections I/O standard not applicable.
2. Series capacitor coupled.
VCU110 Evaluation Board
UG1073 (v1.2) March 26, 2016
FPGA
Schematic Net Name
(U1) Pin
AG40
BULLSEYE1_GTY_TX0_P
AG41
BULLSEYE1_GTY_TX0_N
AG45
BULLSEYE1_GTY_RX0_P
AG46
BULLSEYE1_GTY_RX0_N
AF38
BULLSEYE1_GTY_TX1_P
AF39
BULLSEYE1_GTY_TX1_N
AF43
BULLSEYE1_GTY_RX1_P
AF44
BULLSEYE1_GTY_RX1_N
AE40
BULLSEYE1_GTY_TX2_P
AE41
BULLSEYE1_GTY_TX2_N
AE45
BULLSEYE1_GTY_RX2_P
AE46
BULLSEYE1_GTY_RX2_N
AD38
BULLSEYE1_GTY_TX3_P
AD39
BULLSEYE1_GTY_TX3_N
AD43
BULLSEYE1_GTY_RX3_P
AD44
BULLSEYE1_GTY_RX3_N
AC36
BULLSEYE1_GTY_REFCLK0_C_P
AC37
BULLSEYE1_GTY_REFCLK0_C_N
AB34
BULLSEYE1_GTY_REFCLK1_C_P
AB35
BULLSEYE1_GTY_REFCLK1_C_N
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Chapter 1:
VCU110 Evaluation Board Features
Connected
Connected
(1)
Pin Number
Pin Name
15
16
17
18
11
12
13
14
7
8
9
10
3
4
5
6
(2)
19
(2)
20
(2)
1
(2)
2
Send Feedback
Connected
Device
P15
P16
P17
P18
P11
P12
P13
P14
P7
P8
BULLSEYE1
J87
P9
P10
P3
P4
P5
P6
P19
P20
P1
P2
53
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