Xilinx VCU110 User Manual page 141

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VCU110 Evaluation Board
UG1073 (v1.2) March 26, 2016
IOSTANDARD SSTL12
PACKAGE_PIN J26
IOSTANDARD SSTL12
PACKAGE_PIN K28
IOSTANDARD SSTL12
PACKAGE_PIN N27
IOSTANDARD SSTL12
PACKAGE_PIN L28
IOSTANDARD SSTL12
PACKAGE_PIN K26
IOSTANDARD SSTL12
PACKAGE_PIN M27
IOSTANDARD SSTL12
PACKAGE_PIN K27
IOSTANDARD SSTL12
PACKAGE_PIN L29
IOSTANDARD SSTL12
PACKAGE_PIN H27
IOSTANDARD SSTL12
PACKAGE_PIN J27
IOSTANDARD SSTL12
PACKAGE_PIN G26
IOSTANDARD SSTL12
PACKAGE_PIN F29
IOSTANDARD SSTL12
PACKAGE_PIN G28
IOSTANDARD SSTL12
PACKAGE_PIN E27
IOSTANDARD SSTL12
PACKAGE_PIN E29
IOSTANDARD SSTL12
PACKAGE_PIN F26
IOSTANDARD SSTL12
PACKAGE_PIN F28
IOSTANDARD SSTL12
PACKAGE_PIN N29
IOSTANDARD SSTL12
PACKAGE_PIN N32
IOSTANDARD SSTL12
PACKAGE_PIN M30
IOSTANDARD SSTL12
PACKAGE_PIN N30
IOSTANDARD SSTL12
PACKAGE_PIN K31
IOSTANDARD SSTL12
PACKAGE_PIN M32
IOSTANDARD SSTL12
PACKAGE_PIN J32
IOSTANDARD SSTL12
PACKAGE_PIN J31
IOSTANDARD SSTL12
PACKAGE_PIN K32
IOSTANDARD SSTL12
PACKAGE_PIN E28
IOSTANDARD SSTL12
PACKAGE_PIN L30
IOSTANDARD SSTL12
PACKAGE_PIN G23
IOSTANDARD DIFF_SSTL12 [get_ports "RLD3_36B_DK0_N"]
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Appendix D: Master Constraints File Listing
[get_ports "RLD3_36B_DQ9"]
[get_ports "RLD3_36B_DQ10"]
[get_ports "RLD3_36B_DQ10"]
[get_ports "RLD3_36B_DQ11"]
[get_ports "RLD3_36B_DQ11"]
[get_ports "RLD3_36B_DQ12"]
[get_ports "RLD3_36B_DQ12"]
[get_ports "RLD3_36B_DQ13"]
[get_ports "RLD3_36B_DQ13"]
[get_ports "RLD3_36B_DQ14"]
[get_ports "RLD3_36B_DQ14"]
[get_ports "RLD3_36B_DQ15"]
[get_ports "RLD3_36B_DQ15"]
[get_ports "RLD3_36B_DQ16"]
[get_ports "RLD3_36B_DQ16"]
[get_ports "RLD3_36B_DQ17"]
[get_ports "RLD3_36B_DQ17"]
[get_ports "RLD3_36B_DQ18"]
[get_ports "RLD3_36B_DQ18"]
[get_ports "RLD3_36B_DQ19"]
[get_ports "RLD3_36B_DQ19"]
[get_ports "RLD3_36B_DQ20"]
[get_ports "RLD3_36B_DQ20"]
[get_ports "RLD3_36B_DQ21"]
[get_ports "RLD3_36B_DQ21"]
[get_ports "RLD3_36B_DQ22"]
[get_ports "RLD3_36B_DQ22"]
[get_ports "RLD3_36B_DQ23"]
[get_ports "RLD3_36B_DQ23"]
[get_ports "RLD3_36B_DQ24"]
[get_ports "RLD3_36B_DQ24"]
[get_ports "RLD3_36B_DQ25"]
[get_ports "RLD3_36B_DQ25"]
[get_ports "RLD3_36B_DQ26"]
[get_ports "RLD3_36B_DQ26"]
[get_ports "RLD3_36B_DQ27"]
[get_ports "RLD3_36B_DQ27"]
[get_ports "RLD3_36B_DQ28"]
[get_ports "RLD3_36B_DQ28"]
[get_ports "RLD3_36B_DQ29"]
[get_ports "RLD3_36B_DQ29"]
[get_ports "RLD3_36B_DQ30"]
[get_ports "RLD3_36B_DQ30"]
[get_ports "RLD3_36B_DQ31"]
[get_ports "RLD3_36B_DQ31"]
[get_ports "RLD3_36B_DQ32"]
[get_ports "RLD3_36B_DQ32"]
[get_ports "RLD3_36B_DQ33"]
[get_ports "RLD3_36B_DQ33"]
[get_ports "RLD3_36B_DQ34"]
[get_ports "RLD3_36B_DQ34"]
[get_ports "RLD3_36B_DQ35"]
[get_ports "RLD3_36B_DQ35"]
[get_ports "RLD3_36B_DM0"]
[get_ports "RLD3_36B_DM0"]
[get_ports "RLD3_36B_DM1"]
[get_ports "RLD3_36B_DM1"]
[get_ports "RLD3_36B_DK0_N"]
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