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The third SI5328 U181 jitter-attenuated clock multiplier circuit is shown in
X-Ref Target - Figure 1-12
ILKN_EXAMAX_SI5328_VCC
114.285MHZ
ILKN_EXAMAX_SI5328_XTAL_XA
1
3
ILKN_EXAMAX_SI5328_XTAL_XB
XA
XB
2
4
GND1
GND2
X8
20PPM
GND
10
32
NC
16
NC
17
NC
12
NC
13
SI5328_INT_ALM
NC
NC
11
NC
15
NC
18
NC
19
NC
20
SI5328_RST
21
1
R1489
2
4.70K
1/16W
1%
GND
Figure 1-12: ExaMAX and Interlaken Connector Interface Jitter-Attenuating Clock Multiplier
This SI5328C U181 ExaMAX and Interlaken connector clock multiplier is used to generate
the multiple clock frequencies required to drive these two connector interfaces.
VCU110 Evaluation Board
UG1073 (v1.2) March 26, 2016
1/10W
R1490
UTIL_3V3
FERRITE-220
L105
C2084
1
10UF
2
6.3V
ILKN_EXAMAX_SI5328_VCC
X6S
C2082
C2079
C2078
1
1
1
GND
1UF
0.1UF
0.1UF
2
25V
2
25V
2
25V
X5R
GND
SI5328C-C-GM
5
2
NC
VDD1
NC1
9
NC
VDD2
NC2
14
NC
VDD3
NC3
30
NC
NC4
6
33
NC
XA
NC5
7
XB
29
EXAMAX_SI5328_OUT1_N
CKIN1_P
CKOUT1_N
28
EXAMAX_SI5328_OUT1_P
CKIN1_N
CKOUT1_P
35
ILKN_SI5328_OUT2_P
CKIN2_P
CKOUT2_P
34
ILKN_SI5328_OUT2_N
CKIN2_N
CKOUT2_N
36
CMODE
3
27
NC
INT_C1B
SDI
4
23
ILKN_EXAMAX_SI5328_SDA
C2B
SDA_SDO
22
ILKN_EXAMAX_SI5328_SCL
RATE0
SCL
24
RATE1
A0
25
LOL
A1
26
NC6
A2_SS
NC7
1
8
RST_B
GND1
31
1
CS_CA
GND2
U181
QFN36_6X6MM
2
1
GND
2
GND
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Chapter 1:
UTIL_3V3
C2081
1
1UF
2
25V
X5R
1%
2
100
GND
SI53340-B-GM
1
6
9
EXAMAX_SI5328_OUT1_BUF1_P
CLK0_P
Q0_P
7
10
EXAMAX_SI5328_OUT1_BUF1_N
CLK0_N
Q0_N
NC
3
11
EXAMAX_SI5328_OUT1_BUF2_P
CLK1_P
Q1_P
NC
4
12
EXAMAX_SI5328_OUT1_BUF2_N
CLK1_N
Q1_N
13
NC
Q2_P
2
14
NC
CLK_SEL
Q2_N
15
NC
Q3_P
R1488
16
NC
1
Q3_N
4.70K
U184
QFN16_SI_3X3MM
1/16W
2
1%
GND
GND
UTIL_3V3
FERRITE-330
C2535
C2536
C2537
L135
1
1
1
1
C2534
1UF
1UF
1UF
10UF
25V
25V
25V
2
2
2
2
X5R
X5R
X5R
GND
GND
SI53301
R1617
1
100
10
5
ILKN_SI5328_OUT2_BUF1_P
CLK0_P
Q0_P
1/10W
11
4
ILKN_SI5328_OUT2_BUF1_N
CLK0_N
Q0_N
2
1%
14
32
ILKN_SI5328_OUT2_BUF2_P
CLK1_P
Q1_P
15
31
ILKN_SI5328_OUT2_BUF2_N
CLK1_N
Q1_N
UTIL_3V3
1
30
ILKN_SI5328_OUT2_BUF3_P
DIVA
Q2_P
NC
9
29
ILKN_SI5328_OUT2_BUF3_N
NC1
Q2_N
12
OEA
13
28
ILKN_SI5328_OUT2_BUF4_P
OEB
Q3_P
NC
16
27
ILKN_SI5328_OUT2_BUF4_N
NC2
Q3_N
24
R1618
R1619
DIVB
1
26
ILKN_SI5328_OUT2_BUF5_P
Q4_P
DNP
DNP
3
25
ILKN_SI5328_OUT2_BUF5_N
SFOUTA_0
Q4_N
DNP
DNP
2
SFOUTA_1
2
DNP
DNP
21
Q5_P
22
20
SFOUTB_0
Q5_N
23
SFOUTB_1
R1621
R1620
1
DNP
DNP
8
17
DNP
DNP
CLK_SEL
VREF
2
DNP
DNP
U196
QFN32_5X5MM
GND
GND
GND
VCU110 Evaluation Board Features
Figure
1-12.
EXAMAX_SI5328_OUT1_BUF1_C_P
EXAMAX_SI5328_OUT1_BUF1_C_N
EXAMAX_SI5328_OUT1_BUF2_C_P
EXAMAX_SI5328_OUT1_BUF2_C_N
ILKN_SI5328_OUT2_BUF1_C_P
ILKN_SI5328_OUT2_BUF1_C_N
ILKN_SI5328_OUT2_BUF2_C_P
ILKN_SI5328_OUT2_BUF2_C_N
ILKN_SI5328_OUT2_BUF3_C_P
ILKN_SI5328_OUT2_BUF3_C_N
ILKN_SI5328_OUT2_BUF4_C_P
ILKN_SI5328_OUT2_BUF4_C_N
NC
NC
ILKN_SI5328_OUT2_BUF5_C_P
ILKN_SI5328_OUT2_BUF5_C_N
NC
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