Table of Contents
Advertisement
Table 1-31: VCU110 FPGA U1 GTH Quad 226 Connections
FPGA (U1) Pin
FPGA
Name
(U1) Pin
MGTHTXP0_226
AG7
MGTHTXN0_226
AG6
MGTHRXP0_226
AG2
MGTHRXN0_226
AG1
MGTHTXP1_226
AF9
MGTHTXN1_226
AF8
MGTHRXP1_226
AF4
MGTHRXN1_226
AF3
MGTHTXP2_226
AE7
MGTHTXN2_226
AE6
MGTHRXP2_226
AE2
MGTHRXN2_226
AE1
MGTHTXP3_226
AD9
MGTHTXN3_226
AD8
MGTHRXP3_226
AD4
MGTHRXN3_226
AD3
MGTREFCLK0P_226
AC11
MGTREFCLK0N_226
AC10
MGTREFCLK1P_226
AB13
MGTREFCLK1N_226
AB12
Notes:
1. MGT connections I/O standard not applicable.
2. Series capacitor coupled.
VCU110 Evaluation Board
UG1073 (v1.2) March 26, 2016
Schematic Net Name
HMC_L1TX_4_P
HMC_L1TX_4_N
(2)
HMC_L1RX_4_C_P
(2)
HMC_L1RX_4_C_N
HMC_L1TX_3_P
HMC_L1TX_3_N
(2)
HMC_L1RX_3_C_P
(2)
HMC_L1RX_3_C_N
HMC_L1TX_7_P
HMC_L1TX_7_N
(2)
HMC_L1RX_7_C_P
(2)
HMC_L1RX_7_C_N
HMC_L1TX_5_P
HMC_L1TX_5_N
(2)
HMC_L1RX_5_C_P
(2)
HMC_L1RX_5_C_N
HMC_SI5328_OUT2_BUF2_C_P
HMC_SI5328_OUT2_BUF2_C_N
NA
NA
www.xilinx.com
Chapter 1:
VCU110 Evaluation Board Features
Connected
Connected
(1)
Pin
Pin Name
Number
AF20
L1RXP_4
AF19
L1RXN_4
AG25
L1TXP_4
AG24
L1TXN_4
AK24
L1RXP_3
AK23
L1RXN_3
AH18
L1TXP_3
AH17
L1TXN_3
AJ23
L1RXP_7
AJ22
L1RXN_7
AJ19
L1TXP_7
AJ18
L1TXN_7
AG21
L1RXP_5
AG20
L1RXN_5
AJ27
L1TXP_5
AJ26
L1TXN_5
(2)
35
CKOUT2_P
(2)
34
CKOUT2_N
NA
NA
Connected
Device
HMC
U160
SI5328
U57
NA
NA
NA
68
Send Feedback
Advertisement
Table of Contents
