Xilinx VCU110 User Manual page 31

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Table 1-9: HMC Memory U160 L1 I/F to FPGA U1 GTH Quads 225-228 (Cont'd)
MGT
FPGA (U1) Pin Name
Bank
MGTHTXP0_226
MGTHTXN0_226
MGTHRXP0_226
MGTHRXN0_226
MGTHTXP1_226
MGTHTXN1_226
MGTHRXP1_226
MGTHRXN1_226
MGTHTXP2_226
GTH
MGTHTXN2_226
Quad
MGTHRXP2_226
226
MGTHRXN2_226
MGTHTXP3_226
MGTHTXN3_226
MGTHRXP3_226
MGTHRXN3_226
MGTREFCLK0P_226
MGTREFCLK0N_226
MGTREFCLK1P_226
MGTREFCLK1N_226
VCU110 Evaluation Board
UG1073 (v1.2) March 26, 2016
FPGA
(U1)
Schematic Net Name
Pin
AG7
HMC_L1TX_4_P
AG6
HMC_L1TX_4_N
AG2
HMC_L1RX_4_C_P
AG1
HMC_L1RX_4_C_N
AF9
HMC_L1TX_3_P
AF8
HMC_L1TX_3_N
AF4
HMC_L1RX_3_C_P
AF3
HMC_L1RX_3_C_N
AE7
HMC_L1TX_7_P
AE6
HMC_L1TX_7_N
AE2
HMC_L1RX_7_C_P
AE1
HMC_L1RX_7_C_N
AD9
HMC_L1TX_5_P
AD8
HMC_L1TX_5_N
AD4
HMC_L1RX_5_C_P
AD3
HMC_L1RX_5_C_N
AC11
HMC_SI5328_OUT2_BUF2_C_P
AC10
HMC_SI5328_OUT2_BUF2_C_N
AB13
NA
AB12
NA
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Chapter 1:
VCU110 Evaluation Board Features
Connected
(1)
Pin Number
AG29
AG28
AH26
AH25
AH30
AH29
AD22
AD21
W28
W27
Y26
Y25
Y30
Y29
AA27
AA28
35
34
NA
NA
Send Feedback
Connected
Connected
Pin Name
Device
L1RXP_11
L1RXN_11
L1TXP_11
L1TXN_11
L1RXP_10
L1RXN_10
L1TXP_10
L1TXN_10
HMC
U160
L1RXP_9
L1RXN_9
L1TXP_9
L1TXN_9
L1RXP_8
L1RXN_8
L1TXP_8
L1TXN_8
CKOUT2_P
SI5328
U57
CKOUT2_N
NA
NA
NA
31

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