External Clock; Integrated Distribution Of Bits Ds1 Clock For Multiple Chassis - ADTRAN OPTI-6100 Installation Manual

External Clock

The OPTI-6100 has connections for input and output of clock timing (see
Figure 6 on page 15 for the SMX, or
with a Building Integrated Timing Source (BITS) or similar timing source, it can be connected
to the Primary and Secondary Clock wire-wrap pins (
chassis is also equipped with pins for output of the system timing to other devices.
NOTICE
The
S
external clock input. Connect Shield to frame ground only at the
BITS clock source at the other end of the cable. Connecting the
Shield at only one end of the cable ensures that undesirable ground
loop currents do not flow in the Shield. If the
connected, it should only be through a capacitor to frame ground.
The Clock Output Shield wire-wrap pin should be connected to a
frame ground at the OPTI-6100 chassis. The Shield at the other end
of the cable should be connected through a capacitor to frame
ground, or not connected at all.

Integrated Distribution of BITS DS1 Clock for Multiple Chassis

The OPTI-6100 chassis terminates the primary external DS1 input clock (
100 ohm and the secondary external DS1 input clock (
chassis can provide two framed all ones DS1 output clocks. HS1 provides the Primary Clock
Output ( terminals) and HS2 provides the Secondary Clock Output (
PRI-OUT
This Clock Output can source a DS1 reference clock to a central BITS unit, to other equipment
requiring timing or to other OPTI-6100 chassis.
Two BITS DS1 clock pairs (primary and secondary) can provide timing for up to six chassis. The
redundant BITS DS1 clock pairs are run to the first chassis and up to five other chassis can be
daisy chained through the Primary and Secondary Clock Outputs. A limit of six total chassis is
recommended to simplify fault isolation, improve reliability and reduce jitter accumulation.
Although typically the cable pair between the chassis is short, it can be up to 1310 feet if
desired. The Primary (Secondary) Clock Output is derived from the Primary (Secondary) Clock
Input through a phase lock loop. Equipment and cable redundancy ensure that any OMM
module can fail or be removed without causing a downstream loss of synchronization. The
chassis downstream of the failure detects either a Loss of Signal (LOS) or DS1 Alarm Indication
Signal (AIS) and performs a switch to the other clock copy. If chassis power is removed (both
feeds), or if both OMM modules are unplugged, the downstream chassis goes into holdover.
61184500L1-5L
Figure 7
(Shield) wire-wrap pin is not typically connected at the
on page 18 for the LMX). If the building is equipped
, , and ) on the chasssis rear panel. The
T R S
S
terminals) in 100 ohm. The
SEC-IN
Chassis Installation
Figure 5 on page 13,
wire-wrap pin is
terminals) in
PRI-IN
terminals).
SEC-OUT
47