Chapter 2: Digital Design Considerations - Xilinx RocketIO X User Manual

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Digital Design Considerations
The Physical Coding Sublayer (PCS) portion of the RocketIO X transceiver has been
significantly updated relative to the RocketIO. The RocketIO X PCS supports 8B/10B and
64B/66B encode/decode, SONET compatibility, and generic data modes. The RocketIO X
transceiver operates in four basic internal modes: 16 bit, 20 bit, 32 bit, and 40 bit. When
accompanied by the predefined modes of the Physical Media Attachment (PMA), the user
has a large combination of protocols and data rates from which to choose. With the custom
RocketIO X transceiver, the user has an almost infinite amount of possibilities from which
to choose in constructing the most advanced and easily configurable communication paths
in the history of communication ICs.
The RocketIO X PCS also represents a shift in the configurability of transceivers. This
allows the user to change not only speeds of the PMA in real time, but also protocols
within the PCS. Internal data width, external data width, and data routing can all be
configured on a clock-by-clock basis. With this advancement, users can initialize a
communication channel at a low speed (for example, 2.5 Gb/s using 8B/10B (20 bit
internal) and then auto-negotiate after the channel is stable to a 10.3125 Gb/s speed using
64B/66B (32 bit internal).
Note:
understanding the individual attribute and control port settings within a primitive. Users have the
choice of using the supported primitives in
chapter to better understand PCS configuration and/or to modify attribute and port values to create a
user transceiver configuration.
RocketIO™ X Transceiver User Guide
UG035 (v1.5) November 22, 2004
The information in this chapter is provided to RocketIO X users as a reference for
www.xilinx.com
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Table 1-3, page 27, and ignoring this chapter, or using this
Chapter 2
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