Dimm And Processor Physical Layout - Oracle X5-2L Service Manual

Servicing the DIMMs (CRU)
"DIMM and Processor Physical Layout" on page 102
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"DIMM Population Scenarios" on page 103
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"DIMM Population Rules" on page 104
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"Populating DIMMs for Optimal System Performance" on page 104
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"DIMM Operating Speeds" on page 108
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"DIMM Rank Classification Labels" on page 108
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"Inconsistencies Between DIMM Fault Indicators and the BIOS Isolation of Faulty
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DIMMs" on page 108
"Using the Server Fault Remind Button" on page 108
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"Identify and Remove a Faulty DIMM" on page 109
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"Install a DIMM" on page 113
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Related Information
"Servicing Processors (FRU)" on page 129
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DIMM and Processor Physical Layout

The physical layout of the DIMMs and processor(s) is shown in the following figure. When
viewing the server from the front, processor 0 (P0) is on the left. Notice that each processor, P0
and P1, have four memory channels that are labeled, from left to right, Ch C, Ch D, Ch B, and
Ch A.
102 Oracle Server X5-2L Service Manual • May 2015