Table 5-3: Lcd Interface; Table 5-4: Clock Inputs; Table 5-5: Power Supply - Epson SED1352 Technical Manual

Page 24
TM
FPDI-1
Pin Name
a
Pin Name
UD3-UD0 UD3-UD0
LD3-LD0 LD3-LD0
XSCL FPSHIFT
LP FPLINE
WF MOD
YD FPFRAME O
LCDENB
a
VESA Flat Panel Display Interface Standard (FPDI-1
Pin Name Type F0B Pin #
OSC1 I 92
OSC2 O 93
Pin Name Type F0B Pin #
V P 3, 53
DD
V P 2, 52
SS
SED1352
X16-SP-001-16

Table 5-3: LCD Interface

F1B/D0B
Type F0B Pin #
Pin/Pad #
O 70 - 73 67 - 70
O 74 - 77 71 - 74
O 81 78
O 79 76
O 80 77
78 75
O 82 79
TM
)

Table 5-4: Clock Inputs

F1B/D0B
Driver
Pin/Pad #
89 *
90 *

Table 5-5: Power Supply

F1B/D0B
Driver
Pin/Pad #
50, 100 P
49, 99 P
Epson Research and Development
Driver Description
Upper panel display data for dual panel mode. For
single panel mode, these bits are the most significant 4
CO4 bits of the 8-bit output data to the panel (PD[4:7]). For
4-bit single panel mode, these bits are the 4 bits of
output data to the panel.
Lower panel display data for dual panel mode. For 8-bit
single panel mode, these bits are the least significant 4
CO4
bits of the 8-bit output data to the panel (PD[0:3]). For
4-bit single panels, these bits are driven 0 (low state).
Display data shift clock. Data is shifted into the LCD
CO4
X-drivers on the falling edge of this signal.
Display data latch clock. The falling edge of this signal
CO4 is used to latch a row of display data in the LCD X-
drivers and to turn on the row driver (Y driver).
LCD backplane BIAS signal. This output toggles
CO4
according to the value programmed in AUX[05h].
Vertical scanning start pulse. A logic '1' on this signal,
sampled by the LCD module on the falling edge of LP,
CO4
is used by the panel row driver (Y driver) to indicate
the start of the vertical frame.
LCD enable signal output. It can be used externally to
CO2
turn off the panel supply voltage and backlight.
Description
This pin, along with OSC2, is the 2-terminal crystal interface
when using a 2-terminal crystal as the clock input. If an external
oscillator is used as a clock source, then this pin is the clock input.
This pin, along with OSC1, is the 2-terminal crystal interface
when using a 2-terminal crystal as the clock input. If an external
oscillator is used as a clock source this pin should be left
unconnected.
Description
Voltage supply.
Voltage ground.
Vancouver Design Center
Hardware Functional Specification
Issue Date: 99/07/28