Capptr6 - Capabilities Pointer; Intrline6 - Interrupt Line; Capptr6 - Capabilities Pointer Register; Intrline6 - Interrupt Line Register - Intel I5-520E - DATASHEET ADDENDUM Datasheet

Processor Configuration Registers
6.2.21

CAPPTR6 - Capabilities Pointer

B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
The capabilities pointer provides the address offset to the location of the first entry in
this device's linked list of capabilities.
Table 44.

CAPPTR6 - Capabilities Pointer Register

Default
Bit Access
7:0 RO
6.2.22

INTRLINE6 - Interrupt Line

B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register contains interrupt line routing information. The device itself does not use
this value, rather it is used by device drivers and operating systems to determine
priority and vector information.
Table 45.

INTRLINE6 - Interrupt Line Register

Default
Bit Access
7:0 RW
April 2010
Document Number: 323178-002
RST/
Value PWR
88h Core First Capability (CAPPTR6)
The first capability in the list is the Subsystem ID and
Subsystem Vendor ID Capability.
RST/
Value PWR
00h Core Interrupt Connection (INTCON)
Used to communicate interrupt line routing information. BIOS
Requirement: POST software writes the routing information into
this register as it initializes and configures the system. The
value indicates to which input of the system interrupt controller
this device's interrupt pin is connected.
® TM
Intel Core i7-620LE/UE, i7-610E, i5-520E and Intel
0/6/0/PCI
34h
88h
RO
8 bits
Description
0/6/0/PCI
3Ch
00h
RW
8 bits
Description
®
Celeron
®
Processor P4500, P4505 Series
Datasheet Addendum
101