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Model 2790 SourceMeter
Figure 11-1
Model 2790 status register structure
Questionable
Condition
Temperature Summary
Calibration Summary
Slot 1 Interlock Open
Slot 2 Interlock Open
Command Warning
(Always Zero)
Standard
Operation Complete
Query Error
Device-Dependent Error
Execution Error
Command Error
User Request
Power On
(Always Zero)
Measurement
Condition
Register
Reading Overflow
ROF
LL1
Low Limit 1 Event
High Limit 1 Event
HL1
Low Limit 2 Event
LL2
High Limit 2 Event
HL2
RAV
Reading Available
BN
Buffer Notify
Buffer Available
BAV
BHF
Buffer Half Full
Buffer Full
BF
Buffer Overflow
BOF
HL
Hardware Limit Event
BQF
Buffer Quarter Full
BTF
Buffer Three-Quarter Full
Master Limit
MS
(Always Zero)
15
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Questionable
Questionable
Event
Event Enable
Register
Register
0
0
&
1
1
&
2
2
&
3
3
&
Temp
Temp
&
5
5
&
6
6
&
7
7
&
Cal
Cal
&
Int1
Int1
&
Int2
Int2
&
11
11
&
&
12
12
13
13
&
Warn
Warn
&
15
15
&
Standard
Event
Event
Status
Status
Enable
Register
Register
OPC
&
OPC
1
&
1
QYE
QYE
&
DDE
DDE
&
EXE
EXE
&
CME
CME
&
URQ
URQ
&
PON
PON
&
8
&
8
9
9
&
10
10
&
11
11
&
12
&
12
13
13
&
14
14
&
15
15
&
Measurement
Measurement
Event
Event Enable
Register
Register
ROF
&
ROF
LL1
LL1
&
HL1
HL1
&
LL2
LL2
&
HL2
&
HL2
RAV
RAV
&
BN
BN
&
BAV
BAV
&
BHF
BHF
&
BF
BF
&
BOF
BOF
&
HL
HL
&
BQF
BQF
&
BTF
BTF
&
MS
MS
&
15
15
&
Register
0
1
2
3
Temp
5
6
Logical
7
OR
Cal
Int1
Int2
11
12
13
Warn
15
Output Queue
Logical
OR
MSB = Measurement Summary Bit
EAV = Error Available
QSB = Questionable Summary Bit
MAV = Message Available
ESB = Event Summary Bit
RQS/MSS = Request for Service/Master Summary Status
OSB = Operation Summary Bit
Note: RQS bit is in serial poll byte,
Operation
Condition
Measuring
Waiting for
Logical
Trigger
OR
Filter Settled
Idle State
(Always Zero)
Error Queue
Service
Request
Status
Byte
Enable
Register
Register
MSB
MSB
&
1
1
&
EAV
EAV
&
QSB
QSB
&
MAV
MAV
&
ESB
ESB
&
6
RQS/MSS
OSB
OSB
&
*STB?
*SRE / *SRE?
Master Summary Status (MSS)
MSS bit is in *STB? response.
Operation
Operation
Event
Event Enable
Register
Register
Register
0
0
&
0
1
1
&
1
2
2
&
2
3
3
3
&
Meas
Meas
&
Meas
Trig
Trig
Trig
&
6
6
6
&
7
7
7
&
Filt
Filt
&
Filt
9
9
9
&
Idle
Idle
Idle
&
11
11
11
&
12
12
&
12
13
13
13
&
14
14
14
&
15
15
15
&
11-3
Logical
OR
Logical
OR
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