Table 199. Tim16/Tim17 Register Map And Reset Values - ST STM32L4 5 Series Reference Manual

General-purpose timers (TIM15/TIM16/TIM17)
32.6.20 TIM16/TIM17 register map
TIM16/TIM17 registers are mapped as 16-bit addressable registers as described in the table
below:
Offset Register
TIMx_CR1
0x00
Reset value
TIMx_CR2
0x04
Reset value
TIMx_DIER
0x0C
Reset value
TIMx_SR
0x10
Reset value
TIMx_EGR
0x14
Reset value
TIMx_CCMR1
Output
Compare mode
Reset value
0x18
TIMx_CCMR1
Input Capture
mode
Reset value
TIMx_CCER
0x20
Reset value
TIMx_CNT
0x24
Reset value 0
TIMx_PSC
0x28
Reset value
TIMx_ARR
0x2C
Reset value
1132/1830

Table 199. TIM16/TIM17 register map and reset values

DocID024597 Rev 5
CKD
[1:0]
0 0 0
0 0
0 0 0
0
0
CNT[15:0]
0 0 0 0 0 0 0 0
PSC[15:0]
0 0 0 0 0 0 0 0
ARR[15:0]
1 1 1 1 1 1 1 1
RM0351
0 0 0 0 0
0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
CC1
OC1M
S
[2:0]
[1:0]
0 0 0 0 0 0 0
IC1 CC1
IC1F[3:0] PSC S
[1:0] [1:0]
0 0 0 0 0 0 0 0
0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1