ST STM32L4 5 Series Reference Manual page 1128

General-purpose timers (TIM15/TIM16/TIM17)
32.6.16 TIM16 option register 1 (TIM16_OR1)
Address offset: 0x50
Reset value: 0x0000
31 30 29
Res Res Res
15 14 13
Res Res Res
Bits 31:2 Reserved, must be kept at reset value.
Bits1:0 TI1_RMP[1:0]: Input capture 1 remap
00: TIM16 input capture 1 is connected to I/O
01: TIM16 input capture 1 is connected to LSI
10: TIM16 input capture 1 is connected to LSE
11: TIM16 input capture 1 is connected to RTC wakeup interrupt
32.6.17 TIM16 option register 2 (TIM16_OR2)
Address offset: 0x60
Reset value: 0x0000 0001
31 30 29
Res Res Res
15 14 13
Res Res Res
Bits 31:12 Reserved, must be kept at reset value.
Bit 11 BKCMP2P: BRK COMP2 input polarity
This bit selects the COMP2 input sensitivity. It must be programmed together with the BKP
polarity bit.
0: COMP2 input is active low
1: COMP2 input is active high
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits
Bit 10 BKCMP1P: BRK COMP1 input polarity
This bit selects the COMP1 input sensitivity. It must be programmed together with the BKP
polarity bit.
0: COMP1 input is active low
1: COMP1 input is active high
Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits
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28 27 26 25
Res Res Res Res
12 11 10 9
Res Res Res Res
28 27 26 25
Res Res Res Res
12 11 10 9
BKCM BKCM
Res BKINP
P2P P1P
rw rw rw
in TIMx_BDTR register).
in TIMx_BDTR register).
24 23 22
Res Res Res
8 7 6
Res Res Res
24 23 22
Res Res Res
8 7 6
BKDF1
Res Res
BK1E
rw
DocID024597 Rev 5
21 20 19 18
Res Res Res Res
5 4 3 2
Res Res Res Res
21 20 19 18
Res Res Res Res
5 4 3 2
BKCM
Res Res Res
P2E
rw
RM0351
17 16
Res Res
1 0
TI1_RMP[1:0]
rw rw
17 16
Res Res
1 0
BKCM
BKINE
P1E
rw rw