Avaya Definity SI Maintenance Manual page 1035

ATM-TRK (Circuit Emulation Service Circuit Pack)
Table 10-101. Aux Data YY for ATM Board Error Query Test (#1259) — Continued
If YY=
22
23
24
25
26
27
34
35
37
38
39
40
41
ATM Board Framer Looparound Test (#1260)
Destructive
This test verifies the board's circuit (Time Division Multiplexing) and packet paths
using an on-board, dummy virtual circuit. Before running the test, you must
busyout the ATM-TRK circuit pack ( busyout board UUCSS ) and
switch synchronization ( change synchronization ) from the ATM-TRK
circuit pack
If the ATM-TRK circuit pack is supplying synchronization, the test aborts.
The test sends a digital counter from one of the tone generators via one of the
TDM bus time slots. The ATM framer interface converts this digital counter to ATM
cells and loops them back internally. The ATM-TRK circuit pack converts the cells
back to a digital counter and sends it to the tone receiver for verification. If the
circuit pack passes the circuit check, the software checks the packet path by
sending a packet from the packet-interface circuit pack to the ATM-TRK circuit
pack via the ATM protocol stack.
555-233-123
Then
High-level Path alarm indication signal
High-level Path remote defect indicator
Loss of Cell Delineation
Uncorrectable headers sent by the ATM switch.
Too many cells with invalid VPI/VCI combination.
The signalling link between the board and the ATM switch is down.
AAL5 Excessive retransmission requests -per VC
LAPD Excessive retransmission requests - per VC
ATM CLP (Cell Loss Priority) Bit - see MO ATM-NTWK
ATM Congestion Indicator - see MO ATM-NTWK
ATM Cell Underrun - see MO ATM-NTWK
ATM Cell Overrun - see MO ATM-NTWK
ATM Lost Cells - see MO ATM-NTWK
Continued on next page
Issue 4 May 2002 10-249