Texas Instruments TMS320C28x Reference Manual page 213

ASR64 ACC:P,T
ASR64 ACC:P,T
SYNTAX OPTIONS
ASR64 ACC:P,T
Operands ACC:P Accumulator register (ACC) and product register (P)
T
Description
Flags and N
Modes
Z
C
Repeat
Example
; Arithmetic shift right the 64-bit Var64 by contents of Var16:
MOVL ACC,@Var64+2
MOVL P,@Var64+0
MOV
ASR64 ACC:P,T
MOVL @Var64+2,ACC
MOVL @Var64+0,P
6-56
Upper 16 bits of the multiplicand register (XT)
Arithmetic shift right the 64-bit combined value of the ACC:P registers by the
amount specified in six least significant bits of the T register, T(5:0) = 0...63.
Higher order bits are ignored. As the value is shifted, the most significant bits
are sign extended. If T specifies a shift of 0, then C is cleared; otherwise, C is
filled with the last bit to be shifted out of the ACC:P registers:
SIGN
After the shift, if bit 31 of the ACC register is 1 then ACC:P is negative and the
N bit is set; otherwise N is cleared.
After the shift, the Z flag is set if the combined 64-bit value of the ACC:P is
zero; otherwise, Z is cleared.
If (T[5:0] = 0) clear C; otherwise, the last bit shifted out of the combined 64-bit
value is loaded into the C bit.
This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
T,@Var16
Arithmetic Shift Right of 64-bit Value
OPCODE
0101 0110 0010 1100
ACC:P
Right shift
Contents of T[5:0]
ACC:P
; Load ACC with high 32 bits of Var64
; Load P with low 32 bits of Var64
; Load T with shift value from Var16
; Arithmetic shift right ACC:P by T(5:0)
; Store high 32-bit result into Var64
; Store low 32-bit result into Var64
OBJMODE RPT CYC
1 −
Last bit out or cleared
C
Discard other bits
1