Texas Instruments TMS320C28x Reference Manual page 294

LSL64 ACC:P,#1..16
SYNTAX OPTIONS
LSL64 ACC:P,#1..16
Operands ACC:P Accumulator register (ACC) and product register (P)
#1..16
Description
Flags and N
Modes
Z
C
Repeat
Example
; Logical shift left the 64-bit Var64 by 10:
MOVL
MOVL
LSL64 ACC:P,#10
MOVL
MOVL
Shift value
Logical shift left the 64-bit combined value of the ACC:P registers by the
amount specified in the shift value field. During the shift, the low order bits are
zero-filled and the last bit shifted out is stored in the carry bit flag:
Last bit out
C
Discard other bits
After the shift, if bit 31 of the ACC register is 1 then ACC:P is negative and the
N bit is set; otherwise N is cleared.
After the shift, the Z flag is set if the combined 64-bit value of the ACC:P is
zero; otherwise, Z is cleared.
The last bit shifted out of the combined 64-bit value is loaded into the C bit.
This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
ACC,@Var64+2
P,@Var64+0
@Var64+2,ACC
@Var64+0,P
OPCODE
0101 0110 1010 SHFT
ACC:P
Left shift
(Immediate value)
ACC:P
; Load ACC with high 32 bits of Var64
; Load P with low 32 bits of Var64
; Logical shift left ACC:P by 10
; Store high 32-bit result into Var64
; Store low 32-bit result into Var64
LSL64 ACC:P,#1..16
Logical Shift Left
OBJMODE RPT CYC
1 − 1
0
6-137