Texas Instruments TMS320C28x Reference Manual page 214

ASRL ACC,T
SYNTAX OPTIONS
ASRL ACC,T
Operands ACC
T
Description
Flags and Z
Modes
N
C
Repeat
Example
; Arithmetic shift right contents of VarA by VarB:
MOVL
MOV
ASRL
MOVL
0101 0110 0001 0000
Accumulator register
Upper 16 bits of the multiplicand (XT) register
Perform an arithmetic shift right on the content of the ACC register as
specified by the five least significant bits of the T register, T(4:0) = 0...31.
Higher order bits are ignored. During the shift, the value is sign extended. If T
specifies a shift of 0, then C is cleared; otherwise, C is filled with the last bit to
be shifted out of the ACC register:
SIGN
(Contents of T[4:0]
After the shift, the Z flag is set if the ACC value is zero, else Z is cleared. Even
if the T register specifies a shift of 0, the content of the ACC register is still
tested for the zero condition and Z is affected.
After the shift, the N flag is set if bit 31 of the ACC is 1, else N is cleared. Even
if the T register specifies a shift of 0, the content of the ACC register is still
tested for the negative condition and N is affected.
If (T(4:0) = 0) then C is cleared; otherwise, the last bit shifted out is loaded
into the C flag bit.
This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
ACC,@VarA
T,@VarB
ACC,T
@VarA,ACC
Arithmetic Shift Right of Accumulator
OPCODE
ACC
Right shift
ACC
; ACC = VarA
; T = VarB (shift value)
; Arithmetic shift right ACC by T(4:0)
; Store result into VarA
ASRL ACC,T
OBJMODE RPT
1 −
Last bit out or cleared
C
Discard other bits
CYC
1
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