Texas Instruments TMS320C28x Reference Manual page 497

SUBB ACC,#8bit
SUBB ACC,#8bit
SYNTAX OPTIONS
SUBB ACC,#8bit
Operands ACC
#8bit
Description
Flags and g Z
Modes
N
C
V
OVC
OVM
Repeat
Example
; Decrement contents of 32-bit location VarA:
MOVL
SUBB
MOVL
6-340
Accumulator register
8-bit immediate constant value
Subtract the zero−extended, 8-bit constant from the ACC register:
ACC = ACC − 0:8bit;
After the subtraction, the Z flag is set if ACC is zero, else Z is cleared.
After the subtraction, the N flag is set if bit 31 of the ACC is 1, N is cleared.
If the subtraction generates a borrow, C is cleared; otherwise C is set.
If an overflow occurs, V is set; otherwise, V is not affected.
If(OVM = 0, disabled) then if the operation generates a positive overflow,
then the counter is incremented and if the operation generates a negative
overflow, then the counter is decremented. If(OVM = 1, enabled) then the
counter is not affected by the operation.
If overflow mode bit is set; then the ACC value will saturate maximum
positive (0x7FFFFFFF) or maximum negative (0x80000000) if the operation
overflowed.
This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
ACC,@VarA
ACC,#1
@VarA,ACC
OPCODE
0001 1001 CCCC CCCC
; Load ACC with contents of VarA
; Subtract 1 from ACC
; Store result back into VarA
Subtract 8-bit Value
OBJMODE RPT CYC
X − 1