Table 6−2. Register Operations (Continued)
Mnemonic
32-Bit ACC Register Operations (Continued)
ASRL
ACC,T
CMPL
ACC,loc32
CMPL
ACC,P << PM
CSB
ACC
LSL
ACC,1..16
LSL
ACC,T
LSRL
ACC,T
LSLL
ACC,T
MAXL
ACC,loc32
MINL
ACC,loc32
MOVL
ACC,loc32
MOVL
loc32,ACC
MOVL
P,ACC
MOVL
ACC,P << PM
MOVL
loc32,ACC,COND
NORM
ACC,XARn++/−−
NORM
ACC,*ind
NEG
ACC
NEGTC
ACC
NOT
ACC
ROL
ACC
ROR
ACC
SAT
ACC
SFR
ACC,1..16
SFR
ACC,T
SUBBL
ACC,loc32
Description
Arithmetic shift right of accumulator by T(4:0)
Compare 32-bit value
Compare 32-bit value
Count sign bits
Logical shift left 1 to 16 places
Logical shift left by T(3:0) = 0...15
Logical shift right by T(4:0)
Logical shift left by T(4:0)
Find the 32-bit maximum
Find the 32-bit minimum
Load accumulator with 32 bits
Store 32-bit accumulator
Load P from the accumulator
Load the accumulator with shifted P
Store ACC conditionally
Normalize ACC and modify selected auxiliary register.
C2XLP compatible Normalize ACC operation
Negate ACC
If TC is equivalent to 1, negate ACC
Complement ACC
Rotate ACC left
Rotate ACC right
Saturate ACC based on OVC value
Shift accumulator right by 1 to 16 places
Shift accumulator right by T(3:0) = 0...15
Subtract 32-bit value plus inverse borrow
C28x Assembly Language Instructions
Register Operations
Page
6-57
6-80
6-81
6-83
6-133
6-134
6-144
6-139
6-152
6-155
6-204
6-206
6-212
6-205
6-207
6-253
6-251
6-244
6-248
6-255
6-310
6-311
6-313
6-325
6-326
6-343
6-9
Need help?
Do you have a question about the TMS320C28x and is the answer not in the manual?